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A A B C D E F G H I J K L M N O P Q R S T U V W X Y Z  [Top]
ConstantA_ALTCHARSET  
ConstantA_ATTRIBUTES  
ConstantA_BLINK  
ConstantA_BOLD  
ConstantA_CHARTEXT  
ConstantA_CNF_10B_2  
ConstantA_CNF_10B_T  
ConstantA_CNF_AUI  
ConstantA_CNF_DC_DC_POLARITY  
ConstantA_CNF_EXTND_10B_2  
ConstantA_CNF_LOW_RX_SQUELCH  
ConstantA_CNF_MEDIA_10B_2  
ConstantA_CNF_MEDIA_10B_T  
ConstantA_CNF_MEDIA_AUI  
ConstantA_CNF_MEDIA_AUTO  
ConstantA_CNF_MEDIA_TYPE  
ConstantA_CNF_NO_AUTO_POLARITY  
ConstantA_COLOR  
ConstantA_COLOUR  
ConstantA_DEFAULT  
ConstantA_DIM  
ConstantA_INVIS  
ConstantA_N_ENABLE  
ConstantA_PROTECT  
ConstantA_REVERSE  
ConstantA_STANDOUT  
ConstantA_UNDERLINE  
ConstantA20_INT15_RETRIES  
ConstantA20_INT15_RETRIES  
ConstantA20_KBC_RETRIES  
ConstantA20_KBC_RETRIES  
ConstantA20_MAX_RETRIES  
ConstantA20_MAX_RETRIES  
Enuma20_methods  
Enuma20_methods  
ConstantA20_SCPA_RETRIES  
ConstantA20_SCPA_RETRIES  
Statica3c90x_close a3c90x_close - free()s TX and RX ring, disablex RX/TX, resets NIC
Statica3c90x_free_resources  
Statica3c90x_free_rx_iobuf  
Statica3c90x_free_rx_ring  
Statica3c90x_free_tx_ring  
Statica3c90x_hw_start a3c90x_hw_start - Initialize hardware, copy MAC address
Statica3c90x_internal_IssueCommand  
Statica3c90x_internal_ReadEeprom a3c90x_internal_ReadEeprom - nvs routine to read eeprom data
Statica3c90x_internal_ReadEepromContents  
Statica3c90x_internal_SetWindow  
Statica3c90x_internal_WaitForEeprom  
Statica3c90x_internal_WriteEeprom a3c90x_internal_WriteEeprom - nvs routine to write eeprom data
Statica3c90x_irq  
Statica3c90x_open a3c90x_open - Routine to initialize the card. Initialize hardware,
Statica3c90x_poll a3c90x_poll - Routine that gets called periodically.
Statica3c90x_prepare_rx_desc a3c90x_prepare_rx_desc - fills the rx desc with initial data
Statica3c90x_probe  
Statica3c90x_process_rx_packets a3c90x_process_rx_packets - Checks for received packets,
Statica3c90x_process_tx_packets a3c90x_process_tx_packets - Checks for successfully sent packets,
Statica3c90x_refill_rx_ring a3c90x_refill_rx_ring -checks every entry in the rx ring and reallocates
Statica3c90x_remove a3c90x_remove - Routine to remove the card. Unregisters
Statica3c90x_reset  
Statica3c90x_setup_rx_ring a3c90x_setup_rx_ring - Allocates RX ring, initialize rx_desc values
Statica3c90x_setup_tx_ring a3c90x_setup_tx_ring - Allocates TX ring, initialize tx_desc values
Statica3c90x_transmit a3c90x_transmit - Transmits a packet.
ConstantAAC Address ROM Address Counter (1->enable)
SourceFileabft.c  
SourceFileabft.c  
SourceFileabft.h  
SourceFileabft.h  
Functionabft_fill_data Fill in all variable portions of aBFT
Functionabft_fill_data Fill in all variable portions of aBFT
ConstantABFT_SIG  
ConstantABFT_SIG  
Structureabft_table  
Structureabft_table  
Constantabftab  
Constantabftab  
Macroabort()  
ConstantACF_CONNECTOR_AUI  
ConstantACF_CONNECTOR_BITS  
ConstantACF_CONNECTOR_BNC  
ConstantACF_CONNECTOR_UTP  
ConstantACK acknowledgement
ConstantACK  
ConstantACK acknowledgement
ConstantACK_INTR  
ConstantACK_INTR  
ConstantACON ALE control
SourceFileacpi.c  
SourceFileacpi.h  
StructureACPI_ADR_DEVICE_PATH  
ConstantACPI_ADR_DISPLAY_TYPE_EXTERNAL_  
ConstantACPI_ADR_DISPLAY_TYPE_INTERNAL_  
ConstantACPI_ADR_DISPLAY_TYPE_OTHER  
ConstantACPI_ADR_DISPLAY_TYPE_TV  
ConstantACPI_ADR_DISPLAY_TYPE_VGA  
ConstantACPI_ADR_DP  
Structureacpi_description_header  
ConstantACPI_DEVICE_PATH  
MacroACPI_DISPLAY_ADR(_DeviceIdScheme, _HeadId, _NonVgaOutput, _BiosCanDetect, _VendorInfo, _Type, _Port, _Index)  
ConstantACPI_DP  
ConstantACPI_EXTENDED_DP  
StructureACPI_EXTENDED_HID_DEVICE_PATH  
Functionacpi_fix_checksum @file
StructureACPI_HID_DEVICE_PATH  
ConstantACPI_LENOFF_LEN_MASK  
ConstantACPI_LENOFF_LEN_SHIFT  
ConstantACPI_LENOFF_OFF_MASK  
ConstantACPI_LENOFF_OFF_SHIFT  
ConstantACS_BLOCK  
ConstantACS_BOARD  
ConstantACS_BTEE  
ConstantACS_BULLET  
ConstantACS_CKBOARD  
ConstantACS_DARROW  
ConstantACS_DEGREE  
ConstantACS_DIAMOND  
ConstantACS_HLINE  
ConstantACS_LANTERN  
ConstantACS_LARROW  
ConstantACS_LLCORNER  
ConstantACS_LRCORNER  
ConstantACS_LTEE  
ConstantACS_PLMINUS  
ConstantACS_PLUS  
ConstantACS_RARROW  
ConstantACS_RTEE  
ConstantACS_S1  
ConstantACS_S9  
ConstantACS_TTEE  
ConstantACS_UARROW  
ConstantACS_ULCORNER  
ConstantACS_URCORNER  
ConstantACS_VLINE  
ConstantACTIVATE_ADAPTER_TO_CONFIG  
Inlineactivate_t509_device  
ConstantACTIVE_33V  
Enumadapter  
ConstantADAPTER_CNF_OFFSET  
Functionadd_client  
Functionadd_client  
Staticadd_ipv4_miniroute Add IPv4 minirouting table entry
Functionadd_ipv6_address Add IPv6 interface
Staticadd_ipv6_miniroute Add IPv6 minirouting table entry
ConstantADD_MASK Mask it use of the ADD_PORT register
Staticadd_ndp_entry Add NDP entry
ConstantADD_PORT  
ConstantADD_SIG Expected ID signature
Functionadd_socket_i365  
Functionadd_tls Instantiator
Structureaddr_64_st  
ConstantADDR0  
ConstantADDR1  
ConstantADDR2  
Structureaddress_path_st  
Structureaddress_vector_st  
Structureaddress_vector_st  
ConstantADDRESS_VECTOR_ST_ALIGN  
Functionadjust_pci_device Enable PCI device
ConstantADVERTISE_10_FULL  
ConstantADVERTISE_10_HALF  
ConstantADVERTISE_100_FULL  
ConstantADVERTISE_100_HALF  
ConstantADVERTISE_1000_FULL  
ConstantADVERTISE_1000_HALF  
ConstantADVERTISE_1000FULL Advertise 1000BASE-T full duplex
ConstantADVERTISE_1000HALF Advertise 1000BASE-T half duplex
ConstantADVERTISE_1000XFULL Try for 1000BASE-X full-duplex
ConstantADVERTISE_1000XHALF Try for 1000BASE-X half-duplex
ConstantADVERTISE_1000XPAUSE Try for 1000BASE-X pause
ConstantADVERTISE_1000XPSE_ASYM Try for 1000BASE-X asym pause
ConstantADVERTISE_100BASE4 Try for 100mbps 4k packets
ConstantADVERTISE_100FULL Try for 100mbps full-duplex
ConstantADVERTISE_100HALF Try for 100mbps half-duplex
ConstantADVERTISE_10FULL Try for 10mbps full-duplex
ConstantADVERTISE_10HALF Try for 10mbps half-duplex
ConstantADVERTISE_ALL  
ConstantADVERTISE_CSMA Only selector supported
ConstantADVERTISE_FULL  
ConstantADVERTISE_LPACK Ack link partners response
ConstantADVERTISE_NPAGE Next page bit
ConstantADVERTISE_PAUSE_ASYM Try for asymetric pause
ConstantADVERTISE_PAUSE_CAP Try for pause
ConstantADVERTISE_RESV Unused...
ConstantADVERTISE_RFAULT Say we can detect faults
ConstantADVERTISE_SLCT Selector bits
ConstantADVERTISED_1000baseT_Full  
ConstantADVERTISED_1000baseT_Full  
ConstantADVERTISED_1000baseT_Full  
ConstantADVERTISED_1000baseT_Half  
ConstantADVERTISED_1000baseT_Half  
ConstantADVERTISED_1000baseT_Half  
ConstantADVERTISED_100baseT_Full  
ConstantADVERTISED_100baseT_Full  
ConstantADVERTISED_100baseT_Full  
ConstantADVERTISED_100baseT_Half  
ConstantADVERTISED_100baseT_Half  
ConstantADVERTISED_100baseT_Half  
ConstantADVERTISED_10baseT_Full  
ConstantADVERTISED_10baseT_Full  
ConstantADVERTISED_10baseT_Full  
ConstantADVERTISED_10baseT_Half  
ConstantADVERTISED_10baseT_Half  
ConstantADVERTISED_10baseT_Half  
ConstantADVERTISED_AUI  
ConstantADVERTISED_AUI  
ConstantADVERTISED_Autoneg  
ConstantADVERTISED_Autoneg  
ConstantADVERTISED_BNC  
ConstantADVERTISED_BNC  
ConstantADVERTISED_FIBRE  
ConstantADVERTISED_FIBRE  
ConstantADVERTISED_MII  
ConstantADVERTISED_MII  
ConstantADVERTISED_TP  
ConstantADVERTISED_TP  
SourceFileaes.c  
SourceFileaes.h  
ConstantAES_BLOCKSIZE  
Staticaes_call_axtls Call AXTLS' AES_encrypt() or AES_decrypt() functions
FunctionAES_cbc_decrypt Decrypt a byte sequence (with a block size 16) using the AES cipher.
FunctionAES_cbc_encrypt Encrypt a byte sequence (with a block size 16) using the AES cipher.
Structureaes_context  
FunctionAES_convert_key Change a key for decryption.
Staticaes_decrypt Decrypt data
FunctionAES_decrypt Decrypt a single block (16 bytes) of data
Staticaes_encrypt Encrypt data
FunctionAES_encrypt Encrypt a single block (16 bytes) of data
FunctionAES_set_key Set up AES with the key/iv and cipher size.
Staticaes_setiv Set initialisation vector
Staticaes_setkey Set key
StaticAES_xtime  
ConstantAF  
ConstantAF  
ConstantAF_INET *< IPv4 Internet addresses
ConstantAF_INET6 *< IPv6 Internet addresses
ConstantAGGREGATE_WAIT_TIME  
ConstantAhdocPHYID0  
Staticalaska_init Alaska PHY
Staticalert Print alert message
SourceFilealert.c  
ConstantALERT_ROW  
Staticalign  
ConstantALIGN Keep the LANCE happy...
ConstantALIGN_HIDDEN 4kB page alignment should be enough
ConstantALIGN_HIDDEN 4kB page alignment should be enough
MacroALIGN_POINTER(Pointer, Alignment)  
MacroALIGN_VALUE(Value, Alignment)  
MacroALIGN_VARIABLE(Value)  
ConstantALIGN4 1 longword align
ConstantALIGN8 2 longword (quadword) align
ConstantALL_MASK  
Staticalloc  
Functionalloc_etherdev Allocate Ethernet device
Functionalloc_ibdev Infiniband device creation/destruction
Functionalloc_image Allocate executable/loadable image
Functionalloc_iob @file
Functionalloc_ipoibdev Allocate IPoIB device
Functionalloc_memblock Allocate a memory block
Functionalloc_netdev Allocate network device
Staticalloc_output_file  
Staticalloc_output_file  
Staticalloc_rx  
Macroalloca(size)  
SourceFilealloca.h  
ConstantALLOW_FDX  
ConstantALT_FORM  
Enumalta_offsets  
Enumamd_mii_registers  
Staticamd79c901_read_mode  
SourceFileamd8111e.c  
SourceFileamd8111e.h  
Staticamd8111e_disable  
Staticamd8111e_disable_interrupt  
Staticamd8111e_enable_interrupt  
Staticamd8111e_force_interrupt  
Staticamd8111e_get_mac_address  
Staticamd8111e_init_hw_default  
Staticamd8111e_init_rx_ring  
Staticamd8111e_init_tx_ring  
Staticamd8111e_irq  
Staticamd8111e_poll  
Staticamd8111e_poll_link  
Structureamd8111e_priv  
Staticamd8111e_probe  
Staticamd8111e_probe_ext_phy  
Staticamd8111e_read_phy  
ConstantAMD8111E_REG_DUMP_LEN  
Staticamd8111e_restart  
Structureamd8111e_rx_desc  
Staticamd8111e_start  
Staticamd8111e_transmit Interface Functions *
Structureamd8111e_tx_desc  
Staticamd8111e_wait_link  
Staticamd8111e_wait_tx_ring  
Staticamd8111e_write_phy  
Macroamd8111e_writeq(_UlData,_memMap)  
ConstantANAPARAM_PWR0_MASK  
ConstantANAPARAM_PWR0_SHIFT  
ConstantANAPARAM_PWR1_MASK  
ConstantANAPARAM_PWR1_SHIFT  
ConstantANAPARAM_TXDACOFF_SHIFT  
ConstantANAR_10  
ConstantANAR_10FD  
ConstantANAR_ASMDIR Asymmetric PAUSE support
ConstantANAR_PAUSE Symmetric PAUSE Support
ConstantANAR_T4  
ConstantANAR_TX  
ConstantANAR_TXFD  
ConstantANEG_DONE  
ConstantANEG_FAILED  
ConstantANEG_OK  
ConstantANEG_STATE_SETTLE_TIME  
ConstantANEG_TIMER_ENAB  
ConstantANLPAR_10  
ConstantANLPAR_10FD  
ConstantANLPAR_ASMDIR Asymmetric PAUSE support
ConstantANLPAR_PAUSE Symmetric PAUSE Support
ConstantANLPAR_T4  
ConstantANLPAR_TX  
ConstantANLPAR_TXFD  
SourceFileansi_screen.c  
SourceFileansiesc.c  
SourceFileansiesc.h  
Staticansiesc_call_handler @file
Structureansiesc_context  
ConstantANSIESC_CUP  
ConstantANSIESC_ED  
ConstantANSIESC_ED_ALL  
ConstantANSIESC_ED_FROM_START  
ConstantANSIESC_ED_TO_END  
Structureansiesc_handler  
ConstantANSIESC_MAX_PARAMS  
Functionansiesc_process Process character that may be part of ANSI escape sequence
ConstantANSIESC_SGR  
Staticansiscr_getc  
Staticansiscr_movetoyx  
Staticansiscr_peek  
Staticansiscr_putc  
Staticansiscr_reset  
ConstantANY_ISA_DMA  
SourceFileaoe.c  
SourceFileaoe.h  
Functionaoe_attach  
ConstantAOE_CMD_ATA *< Issue ATA command
ConstantAOE_CMD_CONFIG *< Query Config Information
Staticaoe_command Issue ATA command via an open AoE session
Functionaoe_detach  
Staticaoe_detached_command  
Staticaoe_discover Issue AoE config query for AoE target discovery
Staticaoe_done Mark current AoE command complete
ConstantAOE_ERR_BAD_COMMAND *< Unrecognised command code
ConstantAOE_ERR_BAD_PARAMETER *< Bad argument parameter
ConstantAOE_ERR_BAD_VERSION *< Unsupported version
ConstantAOE_ERR_CONFIG_EXISTS *< Config string present
ConstantAOE_ERR_UNAVAILABLE *< Device unavailable
ConstantAOE_FL_ASYNC *< Asynchronous write
ConstantAOE_FL_DEV_HEAD *< Device/head flag
ConstantAOE_FL_ERROR *< Command generated an error
ConstantAOE_FL_EXTENDED *< LBA48 extended addressing
ConstantAOE_FL_RESPONSE *< Message is a response
ConstantAOE_FL_WRITE *< Write command
Staticaoe_free  
ConstantAOE_MAJOR_BROADCAST  
ConstantAOE_MAX_COUNT  
ConstantAOE_MINOR_BROADCAST  
Staticaoe_parse_root_path  
Staticaoe_rx Process incoming AoE packets
Staticaoe_rx_ata Handle AoE ATA command response
Staticaoe_rx_cfg Handle AoE configuration command response
Staticaoe_send_command Send AoE command
Structureaoe_session  
ConstantAOE_STATUS_ERR_MASK *< Error portion of status code
ConstantAOE_STATUS_PENDING *< Command pending
ConstantAOE_TAG_MAGIC  
Staticaoe_timer_expired Handle AoE retry timer expiry
ConstantAOE_VERSION *< Version 1
ConstantAOE_VERSION_MASK *< Version part of ver_flags field
Structureaoeata  
Staticaoeboot  
Staticaoeboot  
SourceFileaoeboot.c  
SourceFileaoeboot.c  
Structureaoecfg  
Unionaoecmd  
Structureaoehdr  
Staticaout_download  
Staticaout_download  
Staticaout_freebsd_boot  
Staticaout_freebsd_boot  
Staticaout_freebsd_probe  
Staticaout_freebsd_probe  
SourceFileaout_loader.c  
SourceFileaout_loader.c  
Inlineaout_probe  
Inlineaout_probe  
Structureaout_state  
Structureaout_state  
ConstantAP_VALUE Auto-poll value register
EnumAP_VALUE_BITS  
SourceFileapi.h  
Staticapply_dns_settings Apply DNS settings
Staticapply_iscsi_settings Apply iSCSI settings
Staticapply_iscsi_string_setting Apply iSCSI setting
Staticapply_settings Apply all settings
ConstantAR5K_2W_TX_DESC_CTL0_ANT_MODE_X  
ConstantAR5K_2W_TX_DESC_CTL0_ANT_MODE_X  
ConstantAR5K_2W_TX_DESC_CTL0_ANT_MODE_X  
ConstantAR5K_2W_TX_DESC_CTL0_ANT_MODE_X  
ConstantAR5K_2W_TX_DESC_CTL0_CLRDMASK  
ConstantAR5K_2W_TX_DESC_CTL0_ENCRYPT_KE  
ConstantAR5K_2W_TX_DESC_CTL0_FRAME_LEN  
ConstantAR5K_2W_TX_DESC_CTL0_FRAME_TYPE [5210]
ConstantAR5K_2W_TX_DESC_CTL0_FRAME_TYPE  
ConstantAR5K_2W_TX_DESC_CTL0_HEADER_LEN [5210 ?]
ConstantAR5K_2W_TX_DESC_CTL0_HEADER_LEN  
ConstantAR5K_2W_TX_DESC_CTL0_INTREQ  
ConstantAR5K_2W_TX_DESC_CTL0_LONG_PACKE [5210]
ConstantAR5K_2W_TX_DESC_CTL0_RTSENA  
ConstantAR5K_2W_TX_DESC_CTL0_VEOL [5211]
ConstantAR5K_2W_TX_DESC_CTL0_XMIT_RATE  
ConstantAR5K_2W_TX_DESC_CTL0_XMIT_RATE_  
ConstantAR5K_2W_TX_DESC_CTL1_BUF_LEN  
ConstantAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE  
ConstantAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE  
ConstantAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE  
ConstantAR5K_2W_TX_DESC_CTL1_ENCRYPT_KE  
ConstantAR5K_2W_TX_DESC_CTL1_FRAME_TYPE [5211]
ConstantAR5K_2W_TX_DESC_CTL1_FRAME_TYPE  
ConstantAR5K_2W_TX_DESC_CTL1_MORE  
ConstantAR5K_2W_TX_DESC_CTL1_NOACK [5211]
ConstantAR5K_2W_TX_DESC_CTL1_RTS_DURATI [5210 ?]
ConstantAR5K_5210_RX_DESC_STATUS0_DATA_  
ConstantAR5K_5210_RX_DESC_STATUS0_MORE  
ConstantAR5K_5210_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5210_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5210_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5210_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5210_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5210_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5210_RX_DESC_STATUS1_CRC_E  
ConstantAR5K_5210_RX_DESC_STATUS1_DECRY  
ConstantAR5K_5210_RX_DESC_STATUS1_DONE  
ConstantAR5K_5210_RX_DESC_STATUS1_FIFO_  
ConstantAR5K_5210_RX_DESC_STATUS1_FRAME  
ConstantAR5K_5210_RX_DESC_STATUS1_KEY_C  
ConstantAR5K_5210_RX_DESC_STATUS1_KEY_I  
ConstantAR5K_5210_RX_DESC_STATUS1_KEY_I  
ConstantAR5K_5210_RX_DESC_STATUS1_KEY_I  
ConstantAR5K_5210_RX_DESC_STATUS1_PHY_E  
ConstantAR5K_5210_RX_DESC_STATUS1_PHY_E  
ConstantAR5K_5210_RX_DESC_STATUS1_RECEI  
ConstantAR5K_5210_RX_DESC_STATUS1_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS0_DATA_  
ConstantAR5K_5212_RX_DESC_STATUS0_DECOM  
ConstantAR5K_5212_RX_DESC_STATUS0_MORE  
ConstantAR5K_5212_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS0_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS1_CRC_E  
ConstantAR5K_5212_RX_DESC_STATUS1_DECRY  
ConstantAR5K_5212_RX_DESC_STATUS1_DONE  
ConstantAR5K_5212_RX_DESC_STATUS1_FRAME  
ConstantAR5K_5212_RX_DESC_STATUS1_KEY_C  
ConstantAR5K_5212_RX_DESC_STATUS1_KEY_I  
ConstantAR5K_5212_RX_DESC_STATUS1_KEY_I  
ConstantAR5K_5212_RX_DESC_STATUS1_KEY_I  
ConstantAR5K_5212_RX_DESC_STATUS1_MIC_E  
ConstantAR5K_5212_RX_DESC_STATUS1_PHY_E  
ConstantAR5K_5212_RX_DESC_STATUS1_RECEI  
ConstantAR5K_5212_RX_DESC_STATUS1_RECEI  
ConstantAR5K_5414_CBCFG  
ConstantAR5K_5414_CBCFG_BUF_DIS Disable buffer
ConstantAR5K_ACK_FAIL  
ConstantAR5K_ACK_FAIL_5210  
ConstantAR5K_ACK_FAIL_5211  
ConstantAR5K_ACKSIFS Register Address
ConstantAR5K_ACKSIFS_INC ACK SIFS Increment (field)
ConstantAR5K_ADDAC_TEST Register Address
ConstantAR5K_ADDAC_TEST_CAPTURE Begin capture
ConstantAR5K_ADDAC_TEST_LOOP_EN Enable loop
ConstantAR5K_ADDAC_TEST_LOOP_LEN Loop length (field)
ConstantAR5K_ADDAC_TEST_MSB State of MSB
ConstantAR5K_ADDAC_TEST_RXCONT Continuous capture
ConstantAR5K_ADDAC_TEST_TRIG_PTY Trigger polarity
ConstantAR5K_ADDAC_TEST_TRIG_SEL Trigger select
ConstantAR5K_ADDAC_TEST_TST_ARM ARM rx buffer for capture
ConstantAR5K_ADDAC_TEST_TST_MODE Test mode
ConstantAR5K_ADDAC_TEST_TXCONT Test continuous tx
ConstantAR5K_ADDAC_TEST_USE_U8 Use upper 8 bits
ConstantAR5K_AR5210_TX_DESC_FRAME_TYPE_  
ConstantAR5K_AR5210_TX_DESC_FRAME_TYPE_  
ConstantAR5K_AR5210_TX_DESC_FRAME_TYPE_  
ConstantAR5K_AR5210_TX_DESC_FRAME_TYPE_  
ConstantAR5K_AR5210_TX_DESC_FRAME_TYPE_  
MacroAR5K_ASSERT_ENTRY(_e, _s)  
ConstantAR5K_BACKOFF Register Address [5210]
ConstantAR5K_BACKOFF_CNT Backoff count (?)
ConstantAR5K_BACKOFF_CW Backoff Contention Window (?)
MacroAR5K_BB_GAIN(_n)  
ConstantAR5K_BB_GAIN_BASE BaseBand Amplifier Gain table base address
ConstantAR5K_BCR Register Address
ConstantAR5K_BCR_ADHOC Ad-Hoc mode
ConstantAR5K_BCR_AP AP mode
ConstantAR5K_BCR_BCGET  
ConstantAR5K_BCR_BDMAE DMA enable
ConstantAR5K_BCR_TQ1FV Use Queue1 for CAB traffic
ConstantAR5K_BCR_TQ1V Use Queue1 for Beacon traffic
ConstantAR5K_BEACON  
ConstantAR5K_BEACON_5210 Register Address [5210]
ConstantAR5K_BEACON_5211 Register Address [5211+]
ConstantAR5K_BEACON_CNT  
ConstantAR5K_BEACON_CNT_5210  
ConstantAR5K_BEACON_CNT_5211  
ConstantAR5K_BEACON_ENABLE Enable beacons
ConstantAR5K_BEACON_PERIOD Mask for beacon period
ConstantAR5K_BEACON_PERIOD_S  
ConstantAR5K_BEACON_RESET_TSF Force TSF reset
ConstantAR5K_BEACON_TIM Mask for TIM offset
ConstantAR5K_BEACON_TIM_S  
ConstantAR5K_BSR Register Address
ConstantAR5K_BSR_ATIMDLY ATIM delay (?)
ConstantAR5K_BSR_BDLYDMA DMA Beacon delay (?)
ConstantAR5K_BSR_BDLYSW SW Beacon delay (?)
ConstantAR5K_BSR_SNAPSHOTSVALID BCR snapshots are valid (?)
ConstantAR5K_BSR_SNPADHOC Ad-hoc mode set (?)
ConstantAR5K_BSR_SNPBDMAE Beacon DMA enabled (?)
ConstantAR5K_BSR_SNPTQ1FV Queue1 is used for CAB traffic (?)
ConstantAR5K_BSR_SNPTQ1V Queue1 is used for Beacon traffic (?)
ConstantAR5K_BSR_SWBA_CNT  
ConstantAR5K_BSR_TXQ1F Beacon queue (1) finished
ConstantAR5K_BSS_ID0  
ConstantAR5K_BSS_ID1  
ConstantAR5K_BSS_ID1_AID  
ConstantAR5K_BSS_ID1_AID_S  
ConstantAR5K_BSS_IDM0 Upper bits
ConstantAR5K_BSS_IDM1 Lower bits
ConstantAR5K_CCFG Register Address
ConstantAR5K_CCFG_CCU Register Address
ConstantAR5K_CCFG_CCU_CD_THRES CCU Cyc(lic?) debt threshold (field)
ConstantAR5K_CCFG_CCU_CREDIT CCU Credit (field)
ConstantAR5K_CCFG_CCU_CUP_EN CCU Catchup enable
ConstantAR5K_CCFG_CCU_CUP_LCNT CCU Catchup lit(?) count
ConstantAR5K_CCFG_CCU_INIT Initial value during reset
ConstantAR5K_CCFG_CPC_EN Enable performance counters
ConstantAR5K_CCFG_WINDOW_SIZE Compression window size
ConstantAR5K_CCK_FIL_CNT  
ConstantAR5K_CFG Register Address
ConstantAR5K_CFG_CLKGD Clock gated (Disable dynamic clock)
ConstantAR5K_CFG_EEBS EEPROM is busy
ConstantAR5K_CFG_IBSS 0-BSS, 1-IBSS [5211+]
ConstantAR5K_CFG_PCI_THRES PCI Master req q threshold [5211+]
ConstantAR5K_CFG_PCI_THRES_S  
ConstantAR5K_CFG_PHY_OK [5211+]
ConstantAR5K_CFG_SWRB Byte-swap RX buffer
ConstantAR5K_CFG_SWRD Byte-swap RX descriptor
ConstantAR5K_CFG_SWRG Byte-swap Register access
ConstantAR5K_CFG_SWTB Byte-swap TX buffer
ConstantAR5K_CFG_SWTD Byte-swap TX descriptor (for big endian archs)
ConstantAR5K_CFG_TXCNT Tx frame count (?) [5210]
ConstantAR5K_CFG_TXCNT_S  
ConstantAR5K_CFG_TXFSTAT Tx frame status (?) [5210]
ConstantAR5K_CFG_TXFSTRT [5210]
ConstantAR5K_CFP_DUR  
ConstantAR5K_CFP_DUR_5210  
ConstantAR5K_CFP_DUR_5211  
ConstantAR5K_CFP_PERIOD  
ConstantAR5K_CFP_PERIOD_5210  
ConstantAR5K_CFP_PERIOD_5211  
ConstantAR5K_CLR_TMASK  
ConstantAR5K_CPC0 Compression performance counter 0
ConstantAR5K_CPC1 Compression performance counter 1
ConstantAR5K_CPC2 Compression performance counter 2
ConstantAR5K_CPC3 Compression performance counter 3
ConstantAR5K_CPCOVF Compression performance overflow
ConstantAR5K_CR Register Address
ConstantAR5K_CR_RXD RX Disable
ConstantAR5K_CR_RXE RX Enable
ConstantAR5K_CR_SWI Software Interrupt
ConstantAR5K_CR_TXD0 TX Disable for queue 0 on 5210
ConstantAR5K_CR_TXD1 TX Disable for queue 1 on 5210
ConstantAR5K_CR_TXE0 TX Enable for queue 0 on 5210
ConstantAR5K_CR_TXE1 TX Enable for queue 1 on 5210
ConstantAR5K_CTL_CUSTOM  
ConstantAR5K_CTL_ETSI  
ConstantAR5K_CTL_FCC  
ConstantAR5K_CTL_MKK  
ConstantAR5K_CTL_NO_CTL  
ConstantAR5K_CTL_NO_REGDOMAIN  
MacroAR5K_DB2RATE(_n)  
ConstantAR5K_DB2RATE_BASE  
ConstantAR5K_DCCFG Register Address
ConstantAR5K_DCCFG_BCAST_EN Enable decompression for bcast frames
ConstantAR5K_DCCFG_BYPASS_EN Bypass decompression
ConstantAR5K_DCCFG_GLOBAL_EN Enable decompression on all queues
ConstantAR5K_DCCFG_MCAST_EN Enable decompression for mcast frames
ConstantAR5K_DCM_ADDR Decompression mask address (index)
ConstantAR5K_DCM_DATA Decompression mask data
ConstantAR5K_DCU_CHAN_TIME_BASE Register Address -Queue0 DCU_CHAN_TIME
ConstantAR5K_DCU_CHAN_TIME_DUR Channel time duration
ConstantAR5K_DCU_CHAN_TIME_DUR_S  
ConstantAR5K_DCU_CHAN_TIME_ENABLE Enable channel time
ConstantAR5K_DCU_FP Register Address
ConstantAR5K_DCU_FP_BURST_DCU_EN Enable burst prefetch on DCU (?)
ConstantAR5K_DCU_FP_NOBURST_DCU_EN Enable non-burst prefetch on DCU (?)
ConstantAR5K_DCU_FP_NOBURST_EN Enable non-burst prefetch (?)
ConstantAR5K_DCU_GBL_IFS_EIFS  
ConstantAR5K_DCU_GBL_IFS_EIFS_M  
ConstantAR5K_DCU_GBL_IFS_MISC Register Address
ConstantAR5K_DCU_GBL_IFS_MISC_AIFS_CNT_ AIFS cnt reset policy (?)
ConstantAR5K_DCU_GBL_IFS_MISC_DCU_ARB_D DCU Arbiter delay mask
ConstantAR5K_DCU_GBL_IFS_MISC_LFSR_SLIC LFSR Slice Select
ConstantAR5K_DCU_GBL_IFS_MISC_RND_LFSR_ Disable random LFSR slice
ConstantAR5K_DCU_GBL_IFS_MISC_SIFS_CNT_ SIFS cnt reset policy (?)
ConstantAR5K_DCU_GBL_IFS_MISC_SIFS_DUR_ SIFS Duration mask
ConstantAR5K_DCU_GBL_IFS_MISC_TURBO_MOD Turbo mode
ConstantAR5K_DCU_GBL_IFS_MISC_USEC_DUR USEC Duration mask
ConstantAR5K_DCU_GBL_IFS_MISC_USEC_DUR_  
ConstantAR5K_DCU_GBL_IFS_SIFS  
ConstantAR5K_DCU_GBL_IFS_SIFS_M  
ConstantAR5K_DCU_GBL_IFS_SLOT  
ConstantAR5K_DCU_GBL_IFS_SLOT_M  
ConstantAR5K_DCU_LCL_IFS_AIFS Arbitrated Interframe Space
ConstantAR5K_DCU_LCL_IFS_AIFS_MAX Anything above that can cause DCU to hang
ConstantAR5K_DCU_LCL_IFS_AIFS_S  
ConstantAR5K_DCU_LCL_IFS_BASE Register Address -Queue0 DCU_LCL_IFS
ConstantAR5K_DCU_LCL_IFS_CW_MAX Maximum Contention Window
ConstantAR5K_DCU_LCL_IFS_CW_MAX_S  
ConstantAR5K_DCU_LCL_IFS_CW_MIN Minimum Contention Window
ConstantAR5K_DCU_LCL_IFS_CW_MIN_S  
ConstantAR5K_DCU_MISC_ARBLOCK_CTL Arbiter lockout control mask
ConstantAR5K_DCU_MISC_ARBLOCK_CTL_GLOBA Global lockout
ConstantAR5K_DCU_MISC_ARBLOCK_CTL_INTFR Intra-frame lockout
ConstantAR5K_DCU_MISC_ARBLOCK_CTL_NONE No arbiter lockout
ConstantAR5K_DCU_MISC_ARBLOCK_CTL_S  
ConstantAR5K_DCU_MISC_ARBLOCK_IGNORE Ignore Arbiter lockout
ConstantAR5K_DCU_MISC_BACKOFF Mask for backoff threshold
ConstantAR5K_DCU_MISC_BACKOFF_FRAG Enable backoff while bursting
ConstantAR5K_DCU_MISC_BACKOFF_PERSIST Persistent backoff
ConstantAR5K_DCU_MISC_BASE Register Address -Queue0 DCU_MISC
ConstantAR5K_DCU_MISC_BCN_ENABLE Enable Beacon use
ConstantAR5K_DCU_MISC_BLOWN_IFS_POLICY Blown IFS policy (?)
ConstantAR5K_DCU_MISC_ETS_CW_POL End of transmission series
ConstantAR5K_DCU_MISC_ETS_RTS_POL End of transmission series
ConstantAR5K_DCU_MISC_FRAG_WAIT Wait for next fragment
ConstantAR5K_DCU_MISC_FRMPRFTCH_ENABLE Enable frame pre-fetch
ConstantAR5K_DCU_MISC_HCFPOLL_ENABLE CF - Poll enable
ConstantAR5K_DCU_MISC_POST_FR_BKOFF_DIS Disable post-frame backoff
ConstantAR5K_DCU_MISC_SEQ_NUM_INCR_DIS Disable sequence number increment
ConstantAR5K_DCU_MISC_SEQNUM_CTL Sequence number control (?)
ConstantAR5K_DCU_MISC_VIRT_COLL_POLICY Virtual Collision cw policy
ConstantAR5K_DCU_MISC_VIRTCOL Mask for Virtual Collision (?)
ConstantAR5K_DCU_MISC_VIRTCOL_IGNORE  
ConstantAR5K_DCU_MISC_VIRTCOL_NORMAL  
ConstantAR5K_DCU_QCUMASK_BASE Register Address -Queue0 DCU_QCUMASK
ConstantAR5K_DCU_QCUMASK_M  
ConstantAR5K_DCU_RETRY_LMT_BASE Register Address -Queue0 DCU_RETRY_LMT
ConstantAR5K_DCU_RETRY_LMT_LG_RETRY Long retry limit mask
ConstantAR5K_DCU_RETRY_LMT_LG_RETRY_S  
ConstantAR5K_DCU_RETRY_LMT_SH_RETRY Short retry limit mask
ConstantAR5K_DCU_RETRY_LMT_SH_RETRY_S  
ConstantAR5K_DCU_RETRY_LMT_SLG_RETRY Station long retry limit mask (?)
ConstantAR5K_DCU_RETRY_LMT_SLG_RETRY_S  
ConstantAR5K_DCU_RETRY_LMT_SSH_RETRY Station short retry limit mask (?)
ConstantAR5K_DCU_RETRY_LMT_SSH_RETRY_S  
ConstantAR5K_DCU_SEQNUM_BASE  
ConstantAR5K_DCU_SEQNUM_M  
MacroAR5K_DCU_TX_FILTER_0(_n)  
ConstantAR5K_DCU_TX_FILTER_0_BASE  
MacroAR5K_DCU_TX_FILTER_1(_n)  
ConstantAR5K_DCU_TX_FILTER_1_BASE  
ConstantAR5K_DCU_TX_FILTER_CLR  
ConstantAR5K_DCU_TX_FILTER_SET  
ConstantAR5K_DCU_TXP Register Address
ConstantAR5K_DCU_TXP_M Tx pause mask
ConstantAR5K_DCU_TXP_STATUS Tx pause status
ConstantAR5K_DEFAULT_ANTENNA  
ConstantAR5K_DESC_RX_CTL0  
ConstantAR5K_DESC_RX_CTL1_BUF_LEN  
ConstantAR5K_DESC_RX_CTL1_INTREQ  
ConstantAR5K_DESC_RX_PHY_ERROR_64QAM  
ConstantAR5K_DESC_RX_PHY_ERROR_LENGTH  
ConstantAR5K_DESC_RX_PHY_ERROR_NONE  
ConstantAR5K_DESC_RX_PHY_ERROR_PARITY  
ConstantAR5K_DESC_RX_PHY_ERROR_RATE  
ConstantAR5K_DESC_RX_PHY_ERROR_SERVICE  
ConstantAR5K_DESC_RX_PHY_ERROR_TIMING  
ConstantAR5K_DESC_RX_PHY_ERROR_TRANSMIT  
ConstantAR5K_DESC_TX_STATUS0_EXCESSIVE_  
ConstantAR5K_DESC_TX_STATUS0_FIFO_UNDER  
ConstantAR5K_DESC_TX_STATUS0_FILTERED  
ConstantAR5K_DESC_TX_STATUS0_FRAME_XMIT  
ConstantAR5K_DESC_TX_STATUS0_LONG_RETRY  
ConstantAR5K_DESC_TX_STATUS0_LONG_RETRY  
ConstantAR5K_DESC_TX_STATUS0_SEND_TIMES  
ConstantAR5K_DESC_TX_STATUS0_SEND_TIMES  
ConstantAR5K_DESC_TX_STATUS0_SHORT_RETR  
ConstantAR5K_DESC_TX_STATUS0_SHORT_RETR  
ConstantAR5K_DESC_TX_STATUS0_VIRT_COLL_  
ConstantAR5K_DESC_TX_STATUS0_VIRT_COLL_  
ConstantAR5K_DESC_TX_STATUS1_ACK_SIG_ST  
ConstantAR5K_DESC_TX_STATUS1_ACK_SIG_ST  
ConstantAR5K_DESC_TX_STATUS1_COMP_SUCCE  
ConstantAR5K_DESC_TX_STATUS1_DONE  
ConstantAR5K_DESC_TX_STATUS1_FINAL_TS_I  
ConstantAR5K_DESC_TX_STATUS1_FINAL_TS_I  
ConstantAR5K_DESC_TX_STATUS1_SEQ_NUM  
ConstantAR5K_DESC_TX_STATUS1_SEQ_NUM_S  
ConstantAR5K_DESC_TX_STATUS1_XMIT_ANTEN  
ConstantAR5K_DIAG_SW  
ConstantAR5K_DIAG_SW_5210 Register Address [5210]
ConstantAR5K_DIAG_SW_5211 Register Address [5211+]
ConstantAR5K_DIAG_SW_CHAN_INFO  
ConstantAR5K_DIAG_SW_CHAN_INFO_5210 Dump channel info
ConstantAR5K_DIAG_SW_CHAN_INFO_5211  
ConstantAR5K_DIAG_SW_CHANEL_IDLE_HIGH Force channel idle high
ConstantAR5K_DIAG_SW_CORR_FCS  
ConstantAR5K_DIAG_SW_CORR_FCS_5210 Corrupted FCS
ConstantAR5K_DIAG_SW_CORR_FCS_5211  
ConstantAR5K_DIAG_SW_DIS_ACK Disable ACKs
ConstantAR5K_DIAG_SW_DIS_CTS Disable CTSs
ConstantAR5K_DIAG_SW_DIS_DEC Disable decryption
ConstantAR5K_DIAG_SW_DIS_ENC Disable encryption
ConstantAR5K_DIAG_SW_DIS_RX  
ConstantAR5K_DIAG_SW_DIS_RX_5210 Disable recieve
ConstantAR5K_DIAG_SW_DIS_RX_5211  
ConstantAR5K_DIAG_SW_DIS_SEQ_INC Disable seqnum increment (?)[5210]
ConstantAR5K_DIAG_SW_DIS_TX Disable transmit [5210]
ConstantAR5K_DIAG_SW_DIS_WEP_ACK Disable ACKs if WEP key is invalid
ConstantAR5K_DIAG_SW_ECO_ENABLE [5211+]
ConstantAR5K_DIAG_SW_EN_SCRAM_SEED  
ConstantAR5K_DIAG_SW_EN_SCRAM_SEED_5210 Enable fixed scrambler seed
ConstantAR5K_DIAG_SW_EN_SCRAM_SEED_5211  
ConstantAR5K_DIAG_SW_FRAME_NV0  
ConstantAR5K_DIAG_SW_FRAME_NV0_5210  
ConstantAR5K_DIAG_SW_FRAME_NV0_5211 Accept frames of non-zero protocol number
ConstantAR5K_DIAG_SW_IGNORE_CARR_SENSE Ignore virtual carrier sense
ConstantAR5K_DIAG_SW_LOOP_BACK  
ConstantAR5K_DIAG_SW_LOOP_BACK_5210 Loopback (i guess it goes with DIS_TX) [5210]
ConstantAR5K_DIAG_SW_LOOP_BACK_5211  
ConstantAR5K_DIAG_SW_OBSPT_M Observation point select (?)
ConstantAR5K_DIAG_SW_OBSPT_S  
ConstantAR5K_DIAG_SW_PHEAR_ME ???
ConstantAR5K_DIAG_SW_RX_CLEAR_HIGH Force RX Clear high
ConstantAR5K_DIAG_SW_SCRAM_SEED_M Scrambler seed mask
ConstantAR5K_DIAG_SW_SCRAM_SEED_S  
ConstantAR5K_DIAG_SW_SCVRAM_SEED [5210]
MacroAR5K_DISABLE_QUEUE(_q)  
MacroAR5K_EEPROM_AES_DIS(_v)  
MacroAR5K_EEPROM_ANT_GAIN(_v)  
MacroAR5K_EEPROM_ANT_GAIN_2GHZ(_v)  
MacroAR5K_EEPROM_ANT_GAIN_5GHZ(_v)  
MacroAR5K_EEPROM_ART_BUILD_NUM(_v)  
ConstantAR5K_EEPROM_BASE  
MacroAR5K_EEPROM_BURST_DIS(_v)  
MacroAR5K_EEPROM_CAL_DATA_START(_v)  
ConstantAR5K_EEPROM_CCK_OFDM_DELTA  
ConstantAR5K_EEPROM_CFG Register Addres
ConstantAR5K_EEPROM_CFG_CLK_RATE Clock rate
ConstantAR5K_EEPROM_CFG_CLK_RATE_156KHZ  
ConstantAR5K_EEPROM_CFG_CLK_RATE_312KHZ  
ConstantAR5K_EEPROM_CFG_CLK_RATE_625KHZ  
ConstantAR5K_EEPROM_CFG_CLK_RATE_S  
ConstantAR5K_EEPROM_CFG_LIND_EN Enable length indicator (?)
ConstantAR5K_EEPROM_CFG_PROT_KEY Protection key
ConstantAR5K_EEPROM_CFG_PROT_KEY_S  
ConstantAR5K_EEPROM_CFG_SIZE Size determination override
ConstantAR5K_EEPROM_CFG_SIZE_16KBIT  
ConstantAR5K_EEPROM_CFG_SIZE_4KBIT  
ConstantAR5K_EEPROM_CFG_SIZE_8KBIT  
ConstantAR5K_EEPROM_CFG_SIZE_AUTO  
ConstantAR5K_EEPROM_CFG_WR_WAIT_DIS Disable write wait
ConstantAR5K_EEPROM_CHANNEL_DIS  
ConstantAR5K_EEPROM_CHANNEL_POWER  
ConstantAR5K_EEPROM_CHECKSUM EEPROM checksum
ConstantAR5K_EEPROM_CMD Register Addres
ConstantAR5K_EEPROM_CMD_READ EEPROM read
ConstantAR5K_EEPROM_CMD_RESET EEPROM reset
ConstantAR5K_EEPROM_CMD_WRITE EEPROM write
MacroAR5K_EEPROM_COMP_DIS(_v)  
MacroAR5K_EEPROM_CTL(_v) Conformance test limits
ConstantAR5K_EEPROM_DATA  
ConstantAR5K_EEPROM_DATA_5210  
ConstantAR5K_EEPROM_DATA_5211  
MacroAR5K_EEPROM_EAR_FILE_ID(_v)  
MacroAR5K_EEPROM_EAR_FILE_VERSION(_v)  
MacroAR5K_EEPROM_EARSTART(_v)  
MacroAR5K_EEPROM_EEMAP(_v)  
ConstantAR5K_EEPROM_EEP_DELTA  
MacroAR5K_EEPROM_EEP_FILE_VERSION(_v)  
ConstantAR5K_EEPROM_EEP_SCALE  
ConstantAR5K_EEPROM_FCC_MID_EN  
MacroAR5K_EEPROM_FF_DIS(_v)  
MacroAR5K_EEPROM_FREQ_M(_v)  
ConstantAR5K_EEPROM_GROUP1_OFFSET  
ConstantAR5K_EEPROM_GROUP2_OFFSET  
ConstantAR5K_EEPROM_GROUP3_OFFSET  
ConstantAR5K_EEPROM_GROUP4_OFFSET  
ConstantAR5K_EEPROM_GROUP5_OFFSET  
ConstantAR5K_EEPROM_GROUP6_OFFSET  
ConstantAR5K_EEPROM_GROUP7_OFFSET  
ConstantAR5K_EEPROM_GROUP8_OFFSET  
MacroAR5K_EEPROM_GROUPS_START(_v) Start of Groups
MacroAR5K_EEPROM_HAS32KHZCRYSTAL(_v)  
MacroAR5K_EEPROM_HAS32KHZCRYSTAL_OLD(_v)  
ConstantAR5K_EEPROM_HDR Header that contains the device caps
MacroAR5K_EEPROM_HDR_11A(_v)  
MacroAR5K_EEPROM_HDR_11B(_v)  
MacroAR5K_EEPROM_HDR_11G(_v)  
MacroAR5K_EEPROM_HDR_DEVICE(_v)  
MacroAR5K_EEPROM_HDR_RFKILL(_v) Device has RFKill support
MacroAR5K_EEPROM_HDR_T_2GHZ_DIS(_v) Disable turbo for 2Ghz (?)
MacroAR5K_EEPROM_HDR_T_5GHZ_DBM(_v) Max turbo power for a/XR mode (eeprom_init)
MacroAR5K_EEPROM_HDR_T_5GHZ_DIS(_v) Disable turbo for 5Ghz
MacroAR5K_EEPROM_HDR_XR2_DIS(_v)  
MacroAR5K_EEPROM_HDR_XR5_DIS(_v)  
MacroAR5K_EEPROM_HEAVY_CLIP_EN(_v)  
ConstantAR5K_EEPROM_I_GAIN  
MacroAR5K_EEPROM_INFO(_n)  
ConstantAR5K_EEPROM_INFO_BASE EEPROM header
ConstantAR5K_EEPROM_INFO_CKSUM  
ConstantAR5K_EEPROM_INFO_MAX  
ConstantAR5K_EEPROM_IS_HB63 Talon detect
ConstantAR5K_EEPROM_JAP_11A_NEW_EN  
ConstantAR5K_EEPROM_JAP_U1EVEN_EN  
ConstantAR5K_EEPROM_JAP_U1ODD_EN  
ConstantAR5K_EEPROM_JAP_U2_EN  
MacroAR5K_EEPROM_KEY_CACHE_SIZE(_v)  
ConstantAR5K_EEPROM_MAGIC EEPROM Magic number
ConstantAR5K_EEPROM_MAGIC_5210 5210
ConstantAR5K_EEPROM_MAGIC_5211 5211
ConstantAR5K_EEPROM_MAGIC_5212 5212
ConstantAR5K_EEPROM_MAGIC_VALUE Default - found on EEPROM
MacroAR5K_EEPROM_MASK_R0(_v)  
MacroAR5K_EEPROM_MASK_R1(_v)  
ConstantAR5K_EEPROM_MAX_CHAN  
ConstantAR5K_EEPROM_MAX_CTLS  
MacroAR5K_EEPROM_MAX_QCU(_v)  
ConstantAR5K_EEPROM_MISC0  
ConstantAR5K_EEPROM_MISC1  
ConstantAR5K_EEPROM_MISC2  
ConstantAR5K_EEPROM_MISC3  
ConstantAR5K_EEPROM_MISC4  
ConstantAR5K_EEPROM_MISC5  
ConstantAR5K_EEPROM_MISC6  
ConstantAR5K_EEPROM_MODE_11A  
ConstantAR5K_EEPROM_MODE_11B  
ConstantAR5K_EEPROM_MODE_11G  
MacroAR5K_EEPROM_MODES_11A(_v)  
MacroAR5K_EEPROM_MODES_11B(_v)  
MacroAR5K_EEPROM_MODES_11G(_v)  
ConstantAR5K_EEPROM_N_2GHZ_CHAN  
ConstantAR5K_EEPROM_N_2GHZ_CHAN_2413  
ConstantAR5K_EEPROM_N_2GHZ_CHAN_MAX  
ConstantAR5K_EEPROM_N_5GHZ_CHAN  
MacroAR5K_EEPROM_N_CTLS(_v)  
ConstantAR5K_EEPROM_N_EDGES  
ConstantAR5K_EEPROM_N_INTERCEPT_10_2GHZ  
ConstantAR5K_EEPROM_N_INTERCEPT_10_5GHZ  
ConstantAR5K_EEPROM_N_INTERCEPTS  
ConstantAR5K_EEPROM_N_IQ_CAL  
ConstantAR5K_EEPROM_N_MODES  
ConstantAR5K_EEPROM_N_OBDB  
ConstantAR5K_EEPROM_N_PCDAC  
ConstantAR5K_EEPROM_N_PD_CURVES  
ConstantAR5K_EEPROM_N_PD_GAINS  
ConstantAR5K_EEPROM_N_PD_POINTS  
ConstantAR5K_EEPROM_N_PHASE_CAL  
ConstantAR5K_EEPROM_N_POWER_LOC_11B  
ConstantAR5K_EEPROM_N_POWER_LOC_11G  
ConstantAR5K_EEPROM_N_PWR_POINTS_5111  
ConstantAR5K_EEPROM_N_TEST_FREQ  
ConstantAR5K_EEPROM_N_XPD0_POINTS  
ConstantAR5K_EEPROM_N_XPD3_POINTS  
ConstantAR5K_EEPROM_NON_EDGE_M  
ConstantAR5K_EEPROM_OBDB_DIS  
ConstantAR5K_EEPROM_OBDB0_2GHZ  
ConstantAR5K_EEPROM_OBDB1_2GHZ  
MacroAR5K_EEPROM_OFF(_v, _v3_0, _v3_3)  
ConstantAR5K_EEPROM_PCDAC_M  
ConstantAR5K_EEPROM_PCDAC_START  
ConstantAR5K_EEPROM_PCDAC_STEP  
ConstantAR5K_EEPROM_PCDAC_STOP  
ConstantAR5K_EEPROM_POWER_M  
ConstantAR5K_EEPROM_POWER_MAX  
ConstantAR5K_EEPROM_POWER_MIN  
ConstantAR5K_EEPROM_POWER_STEP  
ConstantAR5K_EEPROM_POWER_TABLE_SIZE  
ConstantAR5K_EEPROM_PROTECT EEPROM protect status
ConstantAR5K_EEPROM_PROTECT_RD_0_31 Read protection bit for offsets 0x0 - 0x1f
ConstantAR5K_EEPROM_PROTECT_RD_128_191 0x80 - 0xbf (regdom)
ConstantAR5K_EEPROM_PROTECT_RD_192_207 0xc0 - 0xcf
ConstantAR5K_EEPROM_PROTECT_RD_208_223 0xd0 - 0xdf
ConstantAR5K_EEPROM_PROTECT_RD_224_239 0xe0 - 0xef
ConstantAR5K_EEPROM_PROTECT_RD_240_255 0xf0 - 0xff
ConstantAR5K_EEPROM_PROTECT_RD_32_63 0x20 - 0x3f
ConstantAR5K_EEPROM_PROTECT_RD_64_127 0x40 - 0x7f
ConstantAR5K_EEPROM_PROTECT_WR_0_31 Write protection bit for offsets 0x0 - 0x1f
ConstantAR5K_EEPROM_PROTECT_WR_128_191  
ConstantAR5K_EEPROM_PROTECT_WR_192_207  
ConstantAR5K_EEPROM_PROTECT_WR_208_223  
ConstantAR5K_EEPROM_PROTECT_WR_224_239  
ConstantAR5K_EEPROM_PROTECT_WR_240_255  
ConstantAR5K_EEPROM_PROTECT_WR_32_63  
ConstantAR5K_EEPROM_PROTECT_WR_64_127  
MacroAR5K_EEPROM_READ(_o, _v)  
MacroAR5K_EEPROM_READ_HDR(_o, _v)  
ConstantAR5K_EEPROM_REG_DOMAIN EEPROM regdom
ConstantAR5K_EEPROM_RFKILL_GPIO_SEL  
ConstantAR5K_EEPROM_RFKILL_GPIO_SEL_S  
ConstantAR5K_EEPROM_RFKILL_POLARITY  
ConstantAR5K_EEPROM_RFKILL_POLARITY_S  
ConstantAR5K_EEPROM_RX_CHAIN_DIS  
MacroAR5K_EEPROM_SCALE_OC_DELTA(_x)  
ConstantAR5K_EEPROM_STAT_5210 Register Address [5210]
ConstantAR5K_EEPROM_STAT_5211 Register Address [5211+]
ConstantAR5K_EEPROM_STAT_RDDONE EEPROM read successful
ConstantAR5K_EEPROM_STAT_RDERR EEPROM read failed
ConstantAR5K_EEPROM_STAT_WRDONE EEPROM write successful
ConstantAR5K_EEPROM_STAT_WRERR EEPROM write failed
ConstantAR5K_EEPROM_STATUS  
MacroAR5K_EEPROM_TARGET_PWR_OFF_11A(_v)  
MacroAR5K_EEPROM_TARGET_PWR_OFF_11B(_v)  
MacroAR5K_EEPROM_TARGET_PWR_OFF_11G(_v)  
MacroAR5K_EEPROM_TARGET_PWRSTART(_v)  
ConstantAR5K_EEPROM_TX_CHAIN_DIS  
ConstantAR5K_EEPROM_VERSION EEPROM Version
ConstantAR5K_EEPROM_VERSION_3_0 No idea what's going on before this version
ConstantAR5K_EEPROM_VERSION_3_1 ob/db values for 2Ghz (ar5211_rfregs)
ConstantAR5K_EEPROM_VERSION_3_2 different frequency representation (eeprom_bin2freq)
ConstantAR5K_EEPROM_VERSION_3_3 offsets changed, has 32 CTLs (see below) and ee_false_detect (eeprom_read_modes)
ConstantAR5K_EEPROM_VERSION_3_4 has ee_i_gain, ee_cck_ofdm_power_delta (eeprom_read_modes)
ConstantAR5K_EEPROM_VERSION_4_0 has ee_misc, ee_cal_pier, ee_turbo_max_power and ee_xr_power (eeprom_init)
ConstantAR5K_EEPROM_VERSION_4_1 has ee_margin_tx_rx (eeprom_init)
ConstantAR5K_EEPROM_VERSION_4_2 has ee_cck_ofdm_gain_delta (eeprom_init)
ConstantAR5K_EEPROM_VERSION_4_3 power calibration changes
ConstantAR5K_EEPROM_VERSION_4_4  
ConstantAR5K_EEPROM_VERSION_4_5  
ConstantAR5K_EEPROM_VERSION_4_6 has ee_scaled_cck_delta
ConstantAR5K_EEPROM_VERSION_4_7 4007 ?
ConstantAR5K_EEPROM_VERSION_4_9 EAR futureproofing
ConstantAR5K_EEPROM_VERSION_5_0 Has 2413 PDADC calibration etc
ConstantAR5K_EEPROM_VERSION_5_1 Has capability values
ConstantAR5K_EEPROM_VERSION_5_3 Has spur mitigation tables
MacroAR5K_ENABLE_QUEUE(_q)  
ConstantAR5K_FCS_FAIL  
ConstantAR5K_FCS_FAIL_5210  
ConstantAR5K_FCS_FAIL_5211  
ConstantAR5K_FRAME_CTL_QOSM  
ConstantAR5K_GAIN_CCK_OFDM_GAIN_DELTA  
ConstantAR5K_GAIN_CCK_PROBE_CORR  
MacroAR5K_GAIN_CHECK_ADJUST(_g)  
ConstantAR5K_GAIN_CRN_FIX_BITS_5111  
ConstantAR5K_GAIN_CRN_FIX_BITS_5112  
ConstantAR5K_GAIN_CRN_MAX_FIX_BITS  
ConstantAR5K_GAIN_DYN_ADJUST_HI_MARGIN  
ConstantAR5K_GAIN_DYN_ADJUST_LO_MARGIN  
ConstantAR5K_GAIN_STEP_COUNT  
ConstantAR5K_GPIOCR Register Address
MacroAR5K_GPIOCR_IN(n) Mode 0 for pin n
ConstantAR5K_GPIOCR_INT_ENA Enable GPIO interrupt
MacroAR5K_GPIOCR_INT_SEL(n) Interrupt for GPIO pin n
ConstantAR5K_GPIOCR_INT_SELH Generate interrupt when pin is high
ConstantAR5K_GPIOCR_INT_SELL Generate interrupt when pin is low
MacroAR5K_GPIOCR_OUT(n) Mode 3 for pin n
MacroAR5K_GPIOCR_OUT0(n) Mode 1 for pin n
MacroAR5K_GPIOCR_OUT1(n) Mode 2 for pin n
ConstantAR5K_GPIODI  
ConstantAR5K_GPIODI_M  
ConstantAR5K_GPIODO  
MacroAR5K_HIGH_ID(_a)  
ConstantAR5K_IER Register Address
ConstantAR5K_IER_DISABLE Disable card interrupts
ConstantAR5K_IER_ENABLE Enable card interrupts
ConstantAR5K_IFS0  
ConstantAR5K_IFS0_DIFS  
ConstantAR5K_IFS0_DIFS_S  
ConstantAR5K_IFS0_SIFS  
ConstantAR5K_IFS0_SIFS_S  
ConstantAR5K_IFS1  
ConstantAR5K_IFS1_CS_EN  
ConstantAR5K_IFS1_EIFS  
ConstantAR5K_IFS1_EIFS_S  
ConstantAR5K_IFS1_PIFS  
ConstantAR5K_IFS1_PIFS_S  
ConstantAR5K_IMR Register Address [5210]
ConstantAR5K_IMR_BCNMISC 'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
ConstantAR5K_IMR_BMISS Beacon missed
ConstantAR5K_IMR_BNR Beacon not ready [5211+]
ConstantAR5K_IMR_BRSSI Beacon rssi below threshold (?)
ConstantAR5K_IMR_DPERR Det par Error (?) [5210]
ConstantAR5K_IMR_GPIO GPIO (rf kill)
ConstantAR5K_IMR_HIUERR Host Interface Unit error [5211+]
ConstantAR5K_IMR_MCABT Master Cycle Abort [5210]
ConstantAR5K_IMR_MIB Update MIB counters
ConstantAR5K_IMR_QCBRORN QCU CBR overrun (?) [5211+]
ConstantAR5K_IMR_QCBRURN QCU CBR underrun (?) [5211+]
ConstantAR5K_IMR_QTRIG QCU scheduling trigger [5211+]
ConstantAR5K_IMR_RXCHIRP CHIRP Received [5212+]
ConstantAR5K_IMR_RXDESC RX descriptor request
ConstantAR5K_IMR_RXDOPPLER Doppler chirp received [5212+]
ConstantAR5K_IMR_RXEOL Empty RX descriptor
ConstantAR5K_IMR_RXERR Receive error
ConstantAR5K_IMR_RXKCM RX Key cache miss
ConstantAR5K_IMR_RXNOFRM No frame received (receive timeout)
ConstantAR5K_IMR_RXOK Frame successfuly recieved
ConstantAR5K_IMR_RXORN Receive FIFO overrun
ConstantAR5K_IMR_RXPHY PHY error
ConstantAR5K_IMR_SSERR Signaled System Error [5210]
ConstantAR5K_IMR_SWBA Software beacon alert
ConstantAR5K_IMR_SWI Software interrupt
ConstantAR5K_IMR_TIM [5211+]
ConstantAR5K_IMR_TXDESC TX descriptor request
ConstantAR5K_IMR_TXEOL Empty TX descriptor
ConstantAR5K_IMR_TXERR Transmit error
ConstantAR5K_IMR_TXNOFRM No frame transmited (transmit timeout)
ConstantAR5K_IMR_TXOK Frame successfuly transmited
ConstantAR5K_IMR_TXURN Transmit FIFO underrun
ConstantAR5K_INI_RFGAIN_2GHZ  
ConstantAR5K_INI_RFGAIN_5GHZ  
ConstantAR5K_INI_VAL_11A  
ConstantAR5K_INI_VAL_11A_TURBO  
ConstantAR5K_INI_VAL_11B  
ConstantAR5K_INI_VAL_11G  
ConstantAR5K_INI_VAL_11G_TURBO  
ConstantAR5K_INI_VAL_MAX  
ConstantAR5K_INI_VAL_XR  
ConstantAR5K_INIT_ACK_CTS_TIMEOUT  
ConstantAR5K_INIT_ACK_CTS_TIMEOUT_TURBO  
ConstantAR5K_INIT_CARR_SENSE_EN  
ConstantAR5K_INIT_CFG  
ConstantAR5K_INIT_CFG  
ConstantAR5K_INIT_CYCRSSI_THR1  
ConstantAR5K_INIT_EIFS  
ConstantAR5K_INIT_EIFS_TURBO  
ConstantAR5K_INIT_LG_RETRY  
ConstantAR5K_INIT_PROG_IFS  
ConstantAR5K_INIT_PROG_IFS_TURBO  
ConstantAR5K_INIT_PROTO_TIME_CNTRL  
ConstantAR5K_INIT_PROTO_TIME_CNTRL_TURB  
ConstantAR5K_INIT_SH_RETRY  
ConstantAR5K_INIT_SIFS  
ConstantAR5K_INIT_SIFS_TURBO  
ConstantAR5K_INIT_SLG_RETRY  
ConstantAR5K_INIT_SLOT_TIME  
ConstantAR5K_INIT_SLOT_TIME_TURBO  
ConstantAR5K_INIT_SSH_RETRY  
ConstantAR5K_INIT_TRANSMIT_LATENCY  
ConstantAR5K_INIT_TRANSMIT_LATENCY_TURB  
ConstantAR5K_INIT_TX_LATENCY  
ConstantAR5K_INIT_TX_RETRY  
ConstantAR5K_INIT_USEC  
ConstantAR5K_INIT_USEC_32  
ConstantAR5K_INIT_USEC_TURBO  
ConstantAR5K_INTPEND  
ConstantAR5K_INTPEND_M  
ConstantAR5K_ISR Register Address [5210]
ConstantAR5K_ISR_BCNMISC 'or' of TIM, CAB_END, DTIM_SYNC, BCN_TIMEOUT,
ConstantAR5K_ISR_BMISS Beacon missed
ConstantAR5K_ISR_BNR Beacon not ready [5211+]
ConstantAR5K_ISR_BRSSI Beacon rssi below threshold (?)
ConstantAR5K_ISR_DPERR Det par Error (?) [5210]
ConstantAR5K_ISR_GPIO GPIO (rf kill)
ConstantAR5K_ISR_HIUERR Host Interface Unit error [5211+]
ConstantAR5K_ISR_MCABT Master Cycle Abort [5210]
ConstantAR5K_ISR_MIB Update MIB counters
ConstantAR5K_ISR_QCBRORN QCU CBR overrun [5211+]
ConstantAR5K_ISR_QCBRURN QCU CBR underrun [5211+]
ConstantAR5K_ISR_QTRIG QCU scheduling trigger [5211+]
ConstantAR5K_ISR_RXCHIRP CHIRP Received [5212+]
ConstantAR5K_ISR_RXDESC RX descriptor request
ConstantAR5K_ISR_RXDOPPLER Doppler chirp received [5212+]
ConstantAR5K_ISR_RXEOL Empty RX descriptor
ConstantAR5K_ISR_RXERR Receive error
ConstantAR5K_ISR_RXKCM RX Key cache miss
ConstantAR5K_ISR_RXNOFRM No frame received (receive timeout)
ConstantAR5K_ISR_RXOK Frame successfuly recieved
ConstantAR5K_ISR_RXORN Receive FIFO overrun
ConstantAR5K_ISR_RXPHY PHY error
ConstantAR5K_ISR_SSERR Signaled System Error [5210]
ConstantAR5K_ISR_SWBA Software beacon alert
ConstantAR5K_ISR_SWI Software interrupt
ConstantAR5K_ISR_TIM [5211+]
ConstantAR5K_ISR_TXDESC TX descriptor request
ConstantAR5K_ISR_TXEOL Empty TX descriptor
ConstantAR5K_ISR_TXERR Transmit error
ConstantAR5K_ISR_TXNOFRM No frame transmited (transmit timeout)
ConstantAR5K_ISR_TXOK Frame successfuly transmited
ConstantAR5K_ISR_TXURN Transmit FIFO underrun
ConstantAR5K_KEYCACHE_SIZE  
MacroAR5K_KEYTABLE(_n)  
ConstantAR5K_KEYTABLE_0_5210  
ConstantAR5K_KEYTABLE_0_5211  
MacroAR5K_KEYTABLE_5210(_n)  
MacroAR5K_KEYTABLE_5211(_n)  
ConstantAR5K_KEYTABLE_ANTENNA [5212+]
MacroAR5K_KEYTABLE_MAC0(_n)  
MacroAR5K_KEYTABLE_MAC1(_n)  
ConstantAR5K_KEYTABLE_MIC_OFFSET  
MacroAR5K_KEYTABLE_OFF(_n, x)  
ConstantAR5K_KEYTABLE_SIZE  
ConstantAR5K_KEYTABLE_SIZE_5210  
ConstantAR5K_KEYTABLE_SIZE_5211  
MacroAR5K_KEYTABLE_TYPE(_n)  
ConstantAR5K_KEYTABLE_TYPE_104  
ConstantAR5K_KEYTABLE_TYPE_128  
ConstantAR5K_KEYTABLE_TYPE_40  
ConstantAR5K_KEYTABLE_TYPE_AES [5211+]
ConstantAR5K_KEYTABLE_TYPE_CCM [5212+]
ConstantAR5K_KEYTABLE_TYPE_NULL [5211+]
ConstantAR5K_KEYTABLE_TYPE_TKIP [5212+]
ConstantAR5K_KEYTABLE_VALID  
ConstantAR5K_LAST_TSTP  
MacroAR5K_LOW_ID(_a)  
ConstantAR5K_MAX_GPIO  
ConstantAR5K_MAX_RATES  
ConstantAR5K_MAX_RF_BANKS  
ConstantAR5K_MCAST_FILTER0  
ConstantAR5K_MCAST_FILTER0_5210  
ConstantAR5K_MCAST_FILTER0_5211  
ConstantAR5K_MCAST_FILTER1  
ConstantAR5K_MCAST_FILTER1_5210  
ConstantAR5K_MCAST_FILTER1_5211  
ConstantAR5K_MIBC Register Address
ConstantAR5K_MIBC_CMC Clean MIB Counters
ConstantAR5K_MIBC_COW Warn test indicator
ConstantAR5K_MIBC_FMC Freeze MIB Counters
ConstantAR5K_MIBC_MCS MIB counter strobe
ConstantAR5K_MIC_QOS_CTL Register Address
ConstantAR5K_MIC_QOS_CTL_MQ_EN Enable MIC QoS
MacroAR5K_MIC_QOS_CTL_OFF(_n)  
ConstantAR5K_MIC_QOS_SEL  
MacroAR5K_MIC_QOS_SEL_OFF(_n)  
ConstantAR5K_MISC Register Address
ConstantAR5K_MISC_DMA_OBS_M  
ConstantAR5K_MISC_DMA_OBS_S  
ConstantAR5K_MISC_LED_BLINK [5210]
ConstantAR5K_MISC_LED_DECAY [5210]
ConstantAR5K_MISC_MAC_OBS_LSB_M  
ConstantAR5K_MISC_MAC_OBS_LSB_S  
ConstantAR5K_MISC_MAC_OBS_MSB_M  
ConstantAR5K_MISC_MAC_OBS_MSB_S  
ConstantAR5K_MISC_MISC_OBS_M  
ConstantAR5K_MISC_MISC_OBS_S  
ConstantAR5K_MISC_MODE Register Address
ConstantAR5K_MISC_MODE_ACKSIFS_MEM ACK SIFS memory (?)
ConstantAR5K_MISC_MODE_COMBINED_MIC use rx/tx MIC key
ConstantAR5K_MISC_MODE_FBSSID_MATCH Force BSSID match
ConstantAR5K_NAV  
ConstantAR5K_NAV_5210  
ConstantAR5K_NAV_5211  
ConstantAR5K_NODCU_RETRY_LMT Register Address
ConstantAR5K_NODCU_RETRY_LMT_CW_MIN Minimum contention window mask
ConstantAR5K_NODCU_RETRY_LMT_CW_MIN_S  
ConstantAR5K_NODCU_RETRY_LMT_LG_RETRY Long retry mask
ConstantAR5K_NODCU_RETRY_LMT_LG_RETRY_S  
ConstantAR5K_NODCU_RETRY_LMT_SH_RETRY Short retry limit mask
ConstantAR5K_NODCU_RETRY_LMT_SH_RETRY_S  
ConstantAR5K_NODCU_RETRY_LMT_SLG_RETRY Station long retry limit mask
ConstantAR5K_NODCU_RETRY_LMT_SLG_RETRY_  
ConstantAR5K_NODCU_RETRY_LMT_SSH_RETRY Station short retry limit mask
ConstantAR5K_NODCU_RETRY_LMT_SSH_RETRY_  
ConstantAR5K_NOQCU_TXDP0 Queue 0 - data
ConstantAR5K_NOQCU_TXDP1 Queue 1 - beacons
ConstantAR5K_NUM_GPIO  
ConstantAR5K_OFDM_FIL_CNT  
ConstantAR5K_PCICFG Register Address
ConstantAR5K_PCICFG_BUS_SEL Mask for "bus select" [5211+] (?)
ConstantAR5K_PCICFG_CBEFIX_DIS Disable CBE fix
ConstantAR5K_PCICFG_CLKRUNEN CLKRUN enable [5211+]
ConstantAR5K_PCICFG_EEAE Eeprom access enable [5210]
ConstantAR5K_PCICFG_EESIZE Mask for EEPROM size [5211+]
ConstantAR5K_PCICFG_EESIZE_16K 16K
ConstantAR5K_PCICFG_EESIZE_4K 4K
ConstantAR5K_PCICFG_EESIZE_8K 8K
ConstantAR5K_PCICFG_EESIZE_FAIL Failed to get size [5211+]
ConstantAR5K_PCICFG_EESIZE_S  
ConstantAR5K_PCICFG_LED Led status [5211+]
ConstantAR5K_PCICFG_LED_ASSOC Associated
ConstantAR5K_PCICFG_LED_BCTL Led blink (?) [5210]
ConstantAR5K_PCICFG_LED_NONE Default [5211+]
ConstantAR5K_PCICFG_LED_PEND Scan / Auth pending
ConstantAR5K_PCICFG_LEDBLINK Led blink rate
ConstantAR5K_PCICFG_LEDBLINK_S  
ConstantAR5K_PCICFG_LEDMODE Ledmode [5211+]
ConstantAR5K_PCICFG_LEDMODE_PROM Default mode (blink on any traffic) [5211+]
ConstantAR5K_PCICFG_LEDMODE_PROP Blink on standard traffic [5211+]
ConstantAR5K_PCICFG_LEDMODE_PWR Some other blinking mode (?) [5211+]
ConstantAR5K_PCICFG_LEDMODE_RAND Random blinking (?) [5211+]
ConstantAR5K_PCICFG_LEDSLOW Slowest led blink rate [5211+]
ConstantAR5K_PCICFG_LEDSTATE  
ConstantAR5K_PCICFG_RETRY_FIX Enable pci core retry fix
ConstantAR5K_PCICFG_SL_INPEN Sleep even whith pending interrupts
ConstantAR5K_PCICFG_SL_INTEN Enable interrupts when asleep
ConstantAR5K_PCICFG_SLEEP_CLOCK_EN Enable sleep clock
ConstantAR5K_PCICFG_SLEEP_CLOCK_RATE Sleep clock rate
ConstantAR5K_PCICFG_SLEEP_CLOCK_RATE_S  
ConstantAR5K_PCICFG_SPWR_DN Mask for power status
ConstantAR5K_PCIE_PM_CTL Register address
ConstantAR5K_PCIE_PM_CTL_AUX_PWR_DET Aux power detect
ConstantAR5K_PCIE_PM_CTL_L0_L0S_CLEAR Clear L0 and L0S counters
ConstantAR5K_PCIE_PM_CTL_L0_L0S_EN Start L0 nd L0S counters
ConstantAR5K_PCIE_PM_CTL_L1_WHEN_D2 enable PCIe core enter L1
ConstantAR5K_PCIE_PM_CTL_LDRESET_EN Enable reset when link goes
ConstantAR5K_PCIE_PM_CTL_PME_CLEAR Clear PME
ConstantAR5K_PCIE_PM_CTL_PME_EN PME Enable
ConstantAR5K_PCIE_PM_CTL_PSM_D0  
ConstantAR5K_PCIE_PM_CTL_PSM_D1  
ConstantAR5K_PCIE_PM_CTL_PSM_D2  
ConstantAR5K_PCIE_PM_CTL_PSM_D3  
ConstantAR5K_PCIE_SERDES  
ConstantAR5K_PCIE_SERDES_RESET  
ConstantAR5K_PCIE_WAEN  
ConstantAR5K_PCU_MAX  
ConstantAR5K_PCU_MIN  
MacroAR5K_PHY(_n)  
ConstantAR5K_PHY_ACT Register Address
ConstantAR5K_PHY_ACT_DISABLE Deactivate PHY
ConstantAR5K_PHY_ACT_ENABLE Activate PHY
ConstantAR5K_PHY_ADC_CTL  
ConstantAR5K_PHY_ADC_CTL_INBUFGAIN_OFF  
ConstantAR5K_PHY_ADC_CTL_INBUFGAIN_OFF_  
ConstantAR5K_PHY_ADC_CTL_INBUFGAIN_ON  
ConstantAR5K_PHY_ADC_CTL_INBUFGAIN_ON_S  
ConstantAR5K_PHY_ADC_CTL_PWD_ADC_OFF  
ConstantAR5K_PHY_ADC_CTL_PWD_BAND_GAP_O  
ConstantAR5K_PHY_ADC_CTL_PWD_DAC_OFF  
ConstantAR5K_PHY_ADC_TEST  
ConstantAR5K_PHY_ADC_TEST_I  
ConstantAR5K_PHY_ADC_TEST_Q  
ConstantAR5K_PHY_ADCSAT  
ConstantAR5K_PHY_ADCSAT_ICNT  
ConstantAR5K_PHY_ADCSAT_ICNT_S  
ConstantAR5K_PHY_ADCSAT_THR  
ConstantAR5K_PHY_ADCSAT_THR_S  
ConstantAR5K_PHY_AGC Register Address
ConstantAR5K_PHY_AGC_DISABLE Disable AGC to A2 (?)
ConstantAR5K_PHY_AGCCOARSE Register Address
ConstantAR5K_PHY_AGCCOARSE_HI AGC Coarse high
ConstantAR5K_PHY_AGCCOARSE_HI_S  
ConstantAR5K_PHY_AGCCOARSE_LO AGC Coarse low
ConstantAR5K_PHY_AGCCOARSE_LO_S  
ConstantAR5K_PHY_AGCCTL Register address
ConstantAR5K_PHY_AGCCTL_CAL Enable PHY calibration
ConstantAR5K_PHY_AGCCTL_NF Enable Noise Floor calibration
ConstantAR5K_PHY_AGCCTL_NF_EN Enable nf calibration to happen (?)
ConstantAR5K_PHY_AGCCTL_NF_NOUPDATE Don't update nf automaticaly
ConstantAR5K_PHY_ANT_CTL Register Address
ConstantAR5K_PHY_ANT_CTL_HITUNE5 Hitune5 (?)
ConstantAR5K_PHY_ANT_CTL_SECTORED_ANT Sectored Antenna
ConstantAR5K_PHY_ANT_CTL_SWTABLE_IDLE Switch table idle (?)
ConstantAR5K_PHY_ANT_CTL_SWTABLE_IDLE_S  
ConstantAR5K_PHY_ANT_CTL_TXRX_EN Enable TX/RX (?)
ConstantAR5K_PHY_ANT_SWITCH_TABLE_0  
ConstantAR5K_PHY_ANT_SWITCH_TABLE_1  
ConstantAR5K_PHY_BAD_TX_RATE  
ConstantAR5K_PHY_BASE  
ConstantAR5K_PHY_BIN_MASK_1  
ConstantAR5K_PHY_BIN_MASK_2  
ConstantAR5K_PHY_BIN_MASK_3  
ConstantAR5K_PHY_BIN_MASK_CTL  
ConstantAR5K_PHY_BIN_MASK_CTL_MASK_4  
ConstantAR5K_PHY_BIN_MASK_CTL_MASK_4_S  
ConstantAR5K_PHY_BIN_MASK_CTL_RATE  
ConstantAR5K_PHY_BIN_MASK_CTL_RATE_S  
ConstantAR5K_PHY_BIN_MASK2_1  
ConstantAR5K_PHY_BIN_MASK2_2  
ConstantAR5K_PHY_BIN_MASK2_3  
ConstantAR5K_PHY_BIN_MASK2_4  
ConstantAR5K_PHY_BIN_MASK2_4_MASK_4  
ConstantAR5K_PHY_BIN_MASK2_4_MASK_4_S  
ConstantAR5K_PHY_BLUETOOTH  
ConstantAR5K_PHY_CCK_CROSSCORR  
ConstantAR5K_PHY_CCK_CROSSCORR_WEAK_SIG  
ConstantAR5K_PHY_CCK_CROSSCORR_WEAK_SIG  
ConstantAR5K_PHY_CCK_RX_CTL_4  
ConstantAR5K_PHY_CCK_RX_CTL_4_FREQ_EST_  
ConstantAR5K_PHY_CCK_RX_CTL_4_FREQ_EST_  
ConstantAR5K_PHY_CCKTXCTK_DAC_SCALE  
ConstantAR5K_PHY_CCKTXCTL  
ConstantAR5K_PHY_CCKTXCTL_JAPAN  
ConstantAR5K_PHY_CCKTXCTL_SCRAMBLER_DIS  
ConstantAR5K_PHY_CCKTXCTL_WORLD  
ConstantAR5K_PHY_CHAN_STATUS  
ConstantAR5K_PHY_CHAN_STATUS_BT_ACT  
ConstantAR5K_PHY_CHAN_STATUS_RX_CLR_MAC  
ConstantAR5K_PHY_CHAN_STATUS_RX_CLR_PAP  
ConstantAR5K_PHY_CHAN_STATUS_RX_CLR_RAW  
ConstantAR5K_PHY_CHIP_ID  
ConstantAR5K_PHY_CTL Register Address
ConstantAR5K_PHY_CTL_GEN_SCRAMBLER Generate scrambler
ConstantAR5K_PHY_CTL_LATE_TX_SIG_SYM Late tx signal symbol (?)
ConstantAR5K_PHY_CTL_LOW_FREQ_SLE_EN Enable low freq sleep
ConstantAR5K_PHY_CTL_RX_ANT_SEL RX antenna select
ConstantAR5K_PHY_CTL_RX_ANT_STATIC Static RX antenna
ConstantAR5K_PHY_CTL_RX_DRAIN_RATE RX drain rate (?)
ConstantAR5K_PHY_CTL_TX_ANT_SEL TX antenna select
ConstantAR5K_PHY_CTL_TX_ANT_STATIC Static TX antenna
ConstantAR5K_PHY_CURRENT_RSSI  
ConstantAR5K_PHY_DAC_TEST  
ConstantAR5K_PHY_DAC_TEST_I  
ConstantAR5K_PHY_DAC_TEST_Q  
ConstantAR5K_PHY_DAG_CCK_CTL  
ConstantAR5K_PHY_DAG_CCK_CTL_EN_RSSI_TH  
ConstantAR5K_PHY_DAG_CCK_CTL_RSSI_THR  
ConstantAR5K_PHY_DAG_CCK_CTL_RSSI_THR_S  
ConstantAR5K_PHY_DESIRED_SIZE Register Address
ConstantAR5K_PHY_DESIRED_SIZE_ADC ADC desired size
ConstantAR5K_PHY_DESIRED_SIZE_ADC_S  
ConstantAR5K_PHY_DESIRED_SIZE_PGA PGA desired size
ConstantAR5K_PHY_DESIRED_SIZE_PGA_S  
ConstantAR5K_PHY_DESIRED_SIZE_TOT Total desired size
ConstantAR5K_PHY_DESIRED_SIZE_TOT_S  
ConstantAR5K_PHY_ERR_FIL  
ConstantAR5K_PHY_ERR_FIL_CCK CCK false detect (ANI)
ConstantAR5K_PHY_ERR_FIL_OFDM OFDM false detect (ANI)
ConstantAR5K_PHY_ERR_FIL_RADAR Radar signal
ConstantAR5K_PHY_FAST_ADC  
ConstantAR5K_PHY_FAST_ANT_DIV  
ConstantAR5K_PHY_FAST_ANT_DIV_EN  
ConstantAR5K_PHY_FRAME_CTL  
ConstantAR5K_PHY_FRAME_CTL_5210  
ConstantAR5K_PHY_FRAME_CTL_5211  
ConstantAR5K_PHY_FRAME_CTL_EMU  
ConstantAR5K_PHY_FRAME_CTL_EMU_S  
ConstantAR5K_PHY_FRAME_CTL_ILLLEN_ERR Illegal length
ConstantAR5K_PHY_FRAME_CTL_ILLRATE_ERR Illegal rate
ConstantAR5K_PHY_FRAME_CTL_INI  
ConstantAR5K_PHY_FRAME_CTL_PARITY_ERR Parity error
ConstantAR5K_PHY_FRAME_CTL_PREP_CHINFO Prepend chan info
ConstantAR5K_PHY_FRAME_CTL_SERVICE_ERR  
ConstantAR5K_PHY_FRAME_CTL_TIMING_ERR PHY timing error
ConstantAR5K_PHY_FRAME_CTL_TX_CLIP Mask for tx clip (?)
ConstantAR5K_PHY_FRAME_CTL_TX_CLIP_S  
ConstantAR5K_PHY_FRAME_CTL_TXURN_ERR TX underrun
ConstantAR5K_PHY_GAIN Register Address
ConstantAR5K_PHY_GAIN_2GHZ  
ConstantAR5K_PHY_GAIN_2GHZ_INI_5111  
ConstantAR5K_PHY_GAIN_2GHZ_MARGIN_TXRX  
ConstantAR5K_PHY_GAIN_2GHZ_MARGIN_TXRX_  
ConstantAR5K_PHY_GAIN_OFFSET Register Address
ConstantAR5K_PHY_GAIN_OFFSET_RXTX_FLAG RX-TX flag (?)
ConstantAR5K_PHY_GAIN_TXRX_ATTEN TX-RX Attenuation
ConstantAR5K_PHY_GAIN_TXRX_ATTEN_S  
ConstantAR5K_PHY_GAIN_TXRX_RF_MAX  
ConstantAR5K_PHY_GAIN_TXRX_RF_MAX_S  
ConstantAR5K_PHY_HEAVY_CLIP_ENABLE  
ConstantAR5K_PHY_IQ Register Address
ConstantAR5K_PHY_IQ_CAL_NUM_LOG_MAX Mask for max number of samples in log scale
ConstantAR5K_PHY_IQ_CAL_NUM_LOG_MAX_S  
ConstantAR5K_PHY_IQ_CHAN_MASK_EN Enable channel mask (?)
ConstantAR5K_PHY_IQ_CORR_ENABLE Enable i/q correction
ConstantAR5K_PHY_IQ_CORR_Q_I_COFF Mask for i correction info
ConstantAR5K_PHY_IQ_CORR_Q_I_COFF_S  
ConstantAR5K_PHY_IQ_CORR_Q_Q_COFF Mask for q correction info
ConstantAR5K_PHY_IQ_EARLY_TRIG_THR Early trigger threshold (?) (field)
ConstantAR5K_PHY_IQ_PILOT_MASK_EN Enable pilot mask (?)
ConstantAR5K_PHY_IQ_RUN Run i/q calibration
ConstantAR5K_PHY_IQ_SPUR_FILT_EN Enable spur filter
ConstantAR5K_PHY_IQ_SPUR_RSSI_EN Enable spur rssi
ConstantAR5K_PHY_IQ_USE_PT_DF Use pilot track df (?)
ConstantAR5K_PHY_IQRES_CAL_CORR I/Q Correlation
ConstantAR5K_PHY_IQRES_CAL_PWR_I I (Inphase) power value
ConstantAR5K_PHY_IQRES_CAL_PWR_Q Q (Quadrature) power value
ConstantAR5K_PHY_MAX_RX_LEN  
ConstantAR5K_PHY_MODE Register Address
ConstantAR5K_PHY_MODE_FREQ Freq mode bit
ConstantAR5K_PHY_MODE_FREQ_2GHZ  
ConstantAR5K_PHY_MODE_FREQ_5GHZ  
ConstantAR5K_PHY_MODE_HALF_RATE Enable Half rate (test)
ConstantAR5K_PHY_MODE_MOD PHY Modulation bit
ConstantAR5K_PHY_MODE_MOD_CCK  
ConstantAR5K_PHY_MODE_MOD_DYN Enable Dynamic OFDM/CCK mode [5112+]
ConstantAR5K_PHY_MODE_MOD_OFDM  
ConstantAR5K_PHY_MODE_QUARTER_RATE Enable Quarter rat (test)
ConstantAR5K_PHY_MODE_RAD [5212+]
ConstantAR5K_PHY_MODE_RAD_RF5111  
ConstantAR5K_PHY_MODE_RAD_RF5112  
ConstantAR5K_PHY_MODE_XR Enable XR mode [5112+]
ConstantAR5K_PHY_NF Register address
ConstantAR5K_PHY_NF_ACTIVE Noise floor calibration still active
MacroAR5K_PHY_NF_AVAL(_n)  
ConstantAR5K_PHY_NF_M Noise floor mask
ConstantAR5K_PHY_NF_MINCCA_PWR ???
ConstantAR5K_PHY_NF_MINCCA_PWR_S  
MacroAR5K_PHY_NF_RVAL(_n)  
MacroAR5K_PHY_NF_SVAL(_n)  
ConstantAR5K_PHY_NF_THRESH62 Thresh62 -check ANI patent- (field)
ConstantAR5K_PHY_NF_THRESH62_S  
ConstantAR5K_PHY_NFTHRES  
ConstantAR5K_PHY_OFDM_SELFCORR Register Address
ConstantAR5K_PHY_OFDM_SELFCORR_CYPWR_TH Enable cyclic RSSI thr 1
ConstantAR5K_PHY_OFDM_SELFCORR_CYPWR_TH Mask for Cyclic RSSI threshold 1
ConstantAR5K_PHY_OFDM_SELFCORR_CYPWR_TH  
ConstantAR5K_PHY_OFDM_SELFCORR_CYPWR_TH Cyclic RSSI threshold 3 (field) (?)
ConstantAR5K_PHY_OFDM_SELFCORR_LSCTHR_H Long sc threshold hi rssi (?)
ConstantAR5K_PHY_OFDM_SELFCORR_RSSI_1AT Enable 1A RSSI threshold (?)
ConstantAR5K_PHY_OFDM_SELFCORR_RSSI_1AT 1A RSSI threshold (field) (?)
ConstantAR5K_PHY_PA_CTL Register Address
ConstantAR5K_PHY_PA_CTL_XPA_A_EN Enable XPA A
ConstantAR5K_PHY_PA_CTL_XPA_A_HI XPA A high (?)
ConstantAR5K_PHY_PA_CTL_XPA_B_EN Enable XPA B
ConstantAR5K_PHY_PA_CTL_XPA_B_HI XPA B high (?)
MacroAR5K_PHY_PAPD_I(_n)  
ConstantAR5K_PHY_PAPD_I_BASE  
ConstantAR5K_PHY_PAPD_PROBE  
ConstantAR5K_PHY_PAPD_PROBE_COMP_GAIN  
ConstantAR5K_PHY_PAPD_PROBE_GAINF  
ConstantAR5K_PHY_PAPD_PROBE_GAINF_S  
ConstantAR5K_PHY_PAPD_PROBE_INI_5111 [5212+]
ConstantAR5K_PHY_PAPD_PROBE_INI_5112 [5212+]
ConstantAR5K_PHY_PAPD_PROBE_PCDAC_BIAS  
ConstantAR5K_PHY_PAPD_PROBE_PREDIST_EN  
ConstantAR5K_PHY_PAPD_PROBE_SH_HI_PAR  
ConstantAR5K_PHY_PAPD_PROBE_TX_NEXT  
ConstantAR5K_PHY_PAPD_PROBE_TXPOWER  
ConstantAR5K_PHY_PAPD_PROBE_TXPOWER_S  
ConstantAR5K_PHY_PAPD_PROBE_TYPE [5112+]
ConstantAR5K_PHY_PAPD_PROBE_TYPE_CCK  
ConstantAR5K_PHY_PAPD_PROBE_TYPE_OFDM  
ConstantAR5K_PHY_PAPD_PROBE_TYPE_S  
ConstantAR5K_PHY_PAPD_PROBE_TYPE_XR  
MacroAR5K_PHY_PCDAC_TXPOWER(_n)  
ConstantAR5K_PHY_PCDAC_TXPOWER_BASE  
MacroAR5K_PHY_PDADC_TXPOWER(_n)  
ConstantAR5K_PHY_PDADC_TXPOWER_BASE  
ConstantAR5K_PHY_PLL  
ConstantAR5K_PHY_PLL_20MHZ For half rate (?)
ConstantAR5K_PHY_PLL_40MHZ  
ConstantAR5K_PHY_PLL_40MHZ_5211  
ConstantAR5K_PHY_PLL_40MHZ_5212  
ConstantAR5K_PHY_PLL_40MHZ_5413  
ConstantAR5K_PHY_PLL_44MHZ  
ConstantAR5K_PHY_PLL_44MHZ_5211  
ConstantAR5K_PHY_PLL_44MHZ_5212  
ConstantAR5K_PHY_PLL_HALF_RATE  
ConstantAR5K_PHY_PLL_QUARTER_RATE  
ConstantAR5K_PHY_PLL_RF5111  
ConstantAR5K_PHY_PLL_RF5112  
ConstantAR5K_PHY_PTAT  
ConstantAR5K_PHY_RADAR  
ConstantAR5K_PHY_RADAR_DISABLE  
ConstantAR5K_PHY_RADAR_ENABLE  
ConstantAR5K_PHY_RADAR_FIRPWR_THR Finite Impulse Response
ConstantAR5K_PHY_RADAR_FIRPWR_THRS  
ConstantAR5K_PHY_RADAR_INBANDTHR Inband threshold
ConstantAR5K_PHY_RADAR_INBANDTHR_S  
ConstantAR5K_PHY_RADAR_PHEIGHT_THR Pulse height threshold
ConstantAR5K_PHY_RADAR_PHEIGHT_THR_S  
ConstantAR5K_PHY_RADAR_PRSSI_THR Pulse RSSI/SNR threshold
ConstantAR5K_PHY_RADAR_PRSSI_THR_S  
ConstantAR5K_PHY_RADAR_RSSI_THR Radar RSSI/SNR threshold.
ConstantAR5K_PHY_RADAR_RSSI_THR_S  
MacroAR5K_PHY_READ(ah, _reg)  
ConstantAR5K_PHY_RESTART restart
ConstantAR5K_PHY_RESTART_DIV_GC Fast diversity gc_limit (?)
ConstantAR5K_PHY_RESTART_DIV_GC_S  
ConstantAR5K_PHY_RF_CTL2 Register Address
ConstantAR5K_PHY_RF_CTL2_TXF2TXD_START TX frame to TX data start
ConstantAR5K_PHY_RF_CTL2_TXF2TXD_START_  
ConstantAR5K_PHY_RF_CTL3 Register Address
ConstantAR5K_PHY_RF_CTL3_TXE2XLNA_ON TX end to XLNA on
ConstantAR5K_PHY_RF_CTL3_TXE2XLNA_ON_S  
ConstantAR5K_PHY_RF_CTL4 Register Address
ConstantAR5K_PHY_RF_CTL4_TXE2XPA_A_OFF TX end to XPA A off (field)
ConstantAR5K_PHY_RF_CTL4_TXE2XPA_B_OFF TX end to XPA B off (field)
ConstantAR5K_PHY_RF_CTL4_TXF2XPA_A_ON TX frame to XPA A on (field)
ConstantAR5K_PHY_RF_CTL4_TXF2XPA_B_ON TX frame to XPA B on (field)
ConstantAR5K_PHY_RFBUS_GRANT  
ConstantAR5K_PHY_RFBUS_GRANT_OK  
ConstantAR5K_PHY_RFBUS_REQ  
ConstantAR5K_PHY_RFBUS_REQ_REQUEST  
ConstantAR5K_PHY_RFSTG  
ConstantAR5K_PHY_RFSTG_DISABLE  
ConstantAR5K_PHY_RX_DELAY Register Address
ConstantAR5K_PHY_RX_DELAY_M Mask for RX activate to receive delay (/100ns)
ConstantAR5K_PHY_SCAL  
ConstantAR5K_PHY_SCAL_32MHZ  
ConstantAR5K_PHY_SCAL_32MHZ_2417  
ConstantAR5K_PHY_SCAL_32MHZ_HB63  
ConstantAR5K_PHY_SCLOCK  
ConstantAR5K_PHY_SCLOCK_32MHZ  
ConstantAR5K_PHY_SCR  
ConstantAR5K_PHY_SDELAY  
ConstantAR5K_PHY_SDELAY_32MHZ  
ConstantAR5K_PHY_SETTLING Register Address
ConstantAR5K_PHY_SETTLING_AGC AGC settling time
ConstantAR5K_PHY_SETTLING_AGC_S  
ConstantAR5K_PHY_SETTLING_SWITCH Switch settlig time
ConstantAR5K_PHY_SETTLING_SWITCH_S  
ConstantAR5K_PHY_SHIFT_2GHZ Used to access 2GHz radios
ConstantAR5K_PHY_SHIFT_5GHZ Used to access 5GHz radios (default)
ConstantAR5K_PHY_SIG Register Address
ConstantAR5K_PHY_SIG_FIRPWR FIPWR
ConstantAR5K_PHY_SIG_FIRPWR_S  
ConstantAR5K_PHY_SIG_FIRSTEP FIRSTEP
ConstantAR5K_PHY_SIG_FIRSTEP_S  
ConstantAR5K_PHY_SIGMA_DELTA  
ConstantAR5K_PHY_SIGMA_DELTA_ADC_CLIP  
ConstantAR5K_PHY_SIGMA_DELTA_ADC_CLIP_S  
ConstantAR5K_PHY_SIGMA_DELTA_ADC_SEL  
ConstantAR5K_PHY_SIGMA_DELTA_ADC_SEL_S  
ConstantAR5K_PHY_SIGMA_DELTA_FILT1  
ConstantAR5K_PHY_SIGMA_DELTA_FILT1_S  
ConstantAR5K_PHY_SIGMA_DELTA_FILT2  
ConstantAR5K_PHY_SIGMA_DELTA_FILT2_S  
ConstantAR5K_PHY_SLMT  
ConstantAR5K_PHY_SLMT_32MHZ  
ConstantAR5K_PHY_SPENDING  
ConstantAR5K_PHY_SPUR_PWR Register Address
ConstantAR5K_PHY_SPUR_PWR_FILT Power with SPUR removed (field)
ConstantAR5K_PHY_SPUR_PWR_I SPUR Power estimate for I (field)
ConstantAR5K_PHY_SPUR_PWR_Q SPUR Power estimate for Q (field)
ConstantAR5K_PHY_TIMING_10  
ConstantAR5K_PHY_TIMING_10_PILOT_MASK_2  
ConstantAR5K_PHY_TIMING_10_PILOT_MASK_2  
ConstantAR5K_PHY_TIMING_11 Register address
ConstantAR5K_PHY_TIMING_11_SPUR_DELTA_P Spur delta phase
ConstantAR5K_PHY_TIMING_11_SPUR_DELTA_P  
ConstantAR5K_PHY_TIMING_11_SPUR_FREQ_SD Freq sigma delta
ConstantAR5K_PHY_TIMING_11_SPUR_FREQ_SD  
ConstantAR5K_PHY_TIMING_11_USE_SPUR_IN_ Spur filter in AGC detector
ConstantAR5K_PHY_TIMING_11_USE_SPUR_IN_ Spur filter in OFDM self correlator
ConstantAR5K_PHY_TIMING_3  
ConstantAR5K_PHY_TIMING_3_DSC_EXP  
ConstantAR5K_PHY_TIMING_3_DSC_EXP_S  
ConstantAR5K_PHY_TIMING_3_DSC_MAN  
ConstantAR5K_PHY_TIMING_3_DSC_MAN_S  
ConstantAR5K_PHY_TIMING_7  
ConstantAR5K_PHY_TIMING_8  
ConstantAR5K_PHY_TIMING_8_PILOT_MASK_2  
ConstantAR5K_PHY_TIMING_8_PILOT_MASK_2_  
ConstantAR5K_PHY_TIMING_9  
ConstantAR5K_PHY_TPC_RG1  
ConstantAR5K_PHY_TPC_RG1_NUM_PD_GAIN  
ConstantAR5K_PHY_TPC_RG1_NUM_PD_GAIN_S  
ConstantAR5K_PHY_TPC_RG1_PDGAIN_1  
ConstantAR5K_PHY_TPC_RG1_PDGAIN_1_S  
ConstantAR5K_PHY_TPC_RG1_PDGAIN_2  
ConstantAR5K_PHY_TPC_RG1_PDGAIN_2_S  
ConstantAR5K_PHY_TPC_RG1_PDGAIN_3  
ConstantAR5K_PHY_TPC_RG1_PDGAIN_3_S  
ConstantAR5K_PHY_TPC_RG5  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_BOUNDA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_OVERLA  
ConstantAR5K_PHY_TPC_RG5_PD_GAIN_OVERLA  
ConstantAR5K_PHY_TST1  
ConstantAR5K_PHY_TST1_TXHOLD Set tx hold (?)
ConstantAR5K_PHY_TST1_TXSRC_ALT Set input to tsdac (?)
ConstantAR5K_PHY_TST1_TXSRC_ALT_S  
ConstantAR5K_PHY_TST1_TXSRC_SRC Used with bit 7 (?)
ConstantAR5K_PHY_TST1_TXSRC_SRC_S  
ConstantAR5K_PHY_TST2 Register Address
ConstantAR5K_PHY_TST2_ADC_OBS_SEL ADC OBS Select (field ?)
ConstantAR5K_PHY_TST2_AGC_OBS_SEL_3 AGC OBS Select 3 (?)
ConstantAR5K_PHY_TST2_ALT_RFDATA Alternate RFDATA (5-2GHz switch ?)
ConstantAR5K_PHY_TST2_BBB_OBS_SEL BB OBS Select (field ?)
ConstantAR5K_PHY_TST2_CBUS_MODE Cardbus mode (?)
ConstantAR5K_PHY_TST2_CHANCOR_DUMP_EN Enable Chancor dump (?)
ConstantAR5K_PHY_TST2_CLK32 CLK_OUT is CLK32 (32Khz external)
ConstantAR5K_PHY_TST2_EVEN_CHANCOR_DUMP Even Chancor dump (?)
ConstantAR5K_PHY_TST2_FORCE_AGC_CLR Force AGC clear (?)
ConstantAR5K_PHY_TST2_MINI_OBS_EN Enable mini OBS (?)
ConstantAR5K_PHY_TST2_RFSILENT_EN Enable RFSILENT
ConstantAR5K_PHY_TST2_RX_CLR_SEL RX Clear Select (?)
ConstantAR5K_PHY_TST2_RX2_IS_RX5_INV 2GHz rx path is the 5GHz path inverted (?)
ConstantAR5K_PHY_TST2_SLOW_CLK160 Slow CLK160 (?)
ConstantAR5K_PHY_TST2_TRIG Trigger (?)
ConstantAR5K_PHY_TST2_TRIG_SEL Trigger select (?)
ConstantAR5K_PHY_TURBO Register Address
ConstantAR5K_PHY_TURBO_MIMO Set turbo for mimo mimo
ConstantAR5K_PHY_TURBO_MODE Enable turbo mode
ConstantAR5K_PHY_TURBO_SHORT Set short symbols to turbo mode
ConstantAR5K_PHY_TX_PWR_ADJ  
ConstantAR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE  
ConstantAR5K_PHY_TX_PWR_ADJ_CCK_GAIN_DE  
ConstantAR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I  
ConstantAR5K_PHY_TX_PWR_ADJ_CCK_PCDAC_I  
ConstantAR5K_PHY_TXPOWER_RATE_MAX  
ConstantAR5K_PHY_TXPOWER_RATE_MAX_TPC_E  
ConstantAR5K_PHY_TXPOWER_RATE1  
ConstantAR5K_PHY_TXPOWER_RATE2  
ConstantAR5K_PHY_TXPOWER_RATE3  
ConstantAR5K_PHY_TXPOWER_RATE4  
ConstantAR5K_PHY_WARM_RESET  
ConstantAR5K_PHY_WEAK_OFDM_HIGH_THR  
ConstantAR5K_PHY_WEAK_OFDM_HIGH_THR_M1  
ConstantAR5K_PHY_WEAK_OFDM_HIGH_THR_M1_  
ConstantAR5K_PHY_WEAK_OFDM_HIGH_THR_M2  
ConstantAR5K_PHY_WEAK_OFDM_HIGH_THR_M2_  
ConstantAR5K_PHY_WEAK_OFDM_HIGH_THR_M2_  
ConstantAR5K_PHY_WEAK_OFDM_HIGH_THR_M2_  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR_M1  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR_M1_S  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR_M2  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR_M2_C  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR_M2_C  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR_M2_S  
ConstantAR5K_PHY_WEAK_OFDM_LOW_THR_SELF  
MacroAR5K_PHY_WRITE(ah, _reg, _val)  
ConstantAR5K_PHYERR_CNT1  
ConstantAR5K_PHYERR_CNT1_MASK  
ConstantAR5K_PHYERR_CNT2  
ConstantAR5K_PHYERR_CNT2_MASK  
ConstantAR5K_PIMR Register Address [5211+]
ConstantAR5K_PISR Register Address [5211+]
ConstantAR5K_PROFCNT_CYCLE Cycle count (?)
ConstantAR5K_PROFCNT_RX Rx count
ConstantAR5K_PROFCNT_RXCLR Clear Rx count
ConstantAR5K_PROFCNT_TX Tx count
MacroAR5K_Q_DISABLE_BITS(_reg, _queue)  
MacroAR5K_Q_ENABLE_BITS(_reg, _queue)  
ConstantAR5K_QCU_CBB_ADDR  
ConstantAR5K_QCU_CBB_ADDR_S  
ConstantAR5K_QCU_CBB_SELECT  
ConstantAR5K_QCU_CBCFG  
ConstantAR5K_QCU_CBRCFG_BASE Register Address - Queue0 CBRCFG
ConstantAR5K_QCU_CBRCFG_INTVAL CBR Interval mask
ConstantAR5K_QCU_CBRCFG_INTVAL_S  
ConstantAR5K_QCU_CBRCFG_ORN_THRES CBR overrun threshold mask
ConstantAR5K_QCU_CBRCFG_ORN_THRES_S  
MacroAR5K_QCU_GLOBAL_READ(_r, _q)  
MacroAR5K_QCU_GLOBAL_WRITE(_r, _q)  
ConstantAR5K_QCU_MISC_BASE Register Address -Queue0 MISC
ConstantAR5K_QCU_MISC_BCN_ENABLE Enable Beacon use
ConstantAR5K_QCU_MISC_CBR_RESET_CNT CBR threshold (counter) reset
ConstantAR5K_QCU_MISC_CBR_THRES_ENABLE CBR expired threshold enabled
ConstantAR5K_QCU_MISC_CBREXP_BCN_DIS Disable CBR expired counter (beacon queue)
ConstantAR5K_QCU_MISC_CBREXP_DIS Disable CBR expired counter (normal queue)
ConstantAR5K_QCU_MISC_DCU_CMP_EN Enable frame compression
ConstantAR5K_QCU_MISC_DCU_EARLY DCU early termination
ConstantAR5K_QCU_MISC_FRSHED_ASAP ASAP
ConstantAR5K_QCU_MISC_FRSHED_BCN_SENT_G Beacon sent gated
ConstantAR5K_QCU_MISC_FRSHED_CBR Constant Bit Rate
ConstantAR5K_QCU_MISC_FRSHED_DBA_GT DMA Beacon alert gated
ConstantAR5K_QCU_MISC_FRSHED_M Frame sheduling mask
ConstantAR5K_QCU_MISC_FRSHED_TIM_GT TIMT gated
ConstantAR5K_QCU_MISC_ONESHOT_ENABLE Oneshot enable
ConstantAR5K_QCU_MISC_RDY_VEOL_POLICY TXE reset when RDYTIME expired or VEOL
ConstantAR5K_QCU_ONESHOTARM_CLEAR Register Address -QCU "one shot arm clear (?)"
ConstantAR5K_QCU_ONESHOTARM_CLEAR_M  
ConstantAR5K_QCU_ONESHOTARM_SET Register Address -QCU "one shot arm set (?)"
ConstantAR5K_QCU_ONESHOTARM_SET_M  
ConstantAR5K_QCU_RDYTIMECFG_BASE Register Address - Queue0 RDYTIMECFG
ConstantAR5K_QCU_RDYTIMECFG_ENABLE Ready time enable mask
ConstantAR5K_QCU_RDYTIMECFG_INTVAL Ready time interval mask
ConstantAR5K_QCU_RDYTIMECFG_INTVAL_S  
ConstantAR5K_QCU_RDYTIMESHDN  
ConstantAR5K_QCU_RDYTIMESHDN_M  
ConstantAR5K_QCU_SLEEP_MASK  
ConstantAR5K_QCU_STS_BASE Register Address - Queue0 STS
ConstantAR5K_QCU_STS_CBREXPCNT CBR expired counter
ConstantAR5K_QCU_STS_FRMPENDCNT Frames pending counter
ConstantAR5K_QCU_TXD  
ConstantAR5K_QCU_TXDP_BASE Register Address - Queue0 TXDP
ConstantAR5K_QCU_TXE  
ConstantAR5K_QCUDCU_CLKGT Register Address (?)
ConstantAR5K_QCUDCU_CLKGT_DCU Mask for DCU clock
ConstantAR5K_QCUDCU_CLKGT_QCU Mask for QCU clock
ConstantAR5K_QOS_NOACK Register Address
ConstantAR5K_QOS_NOACK_2BIT_VALUES ???
ConstantAR5K_QOS_NOACK_2BIT_VALUES_S  
ConstantAR5K_QOS_NOACK_BIT_OFFSET ???
ConstantAR5K_QOS_NOACK_BIT_OFFSET_S  
ConstantAR5K_QOS_NOACK_BYTE_OFFSET ???
ConstantAR5K_QOS_NOACK_BYTE_OFFSET_S  
MacroAR5K_QUEUE_CBRCFG(_q)  
MacroAR5K_QUEUE_DCU_SEQNUM(_q)  
MacroAR5K_QUEUE_DFS_CHANNEL_TIME(_q)  
MacroAR5K_QUEUE_DFS_LOCAL_IFS(_q)  
MacroAR5K_QUEUE_DFS_MISC(_q)  
MacroAR5K_QUEUE_DFS_RETRY_LIMIT(_q)  
MacroAR5K_QUEUE_DISABLED(_q)  
MacroAR5K_QUEUE_ENABLED(_q)  
MacroAR5K_QUEUE_MISC(_q)  
MacroAR5K_QUEUE_QCUMASK(_q)  
MacroAR5K_QUEUE_RDYTIMECFG(_q)  
MacroAR5K_QUEUE_REG(_r, _q)  
MacroAR5K_QUEUE_STATUS(_q)  
MacroAR5K_QUEUE_TXDP(_q)  
ConstantAR5K_QUIET_CTL1 Register Address
ConstantAR5K_QUIET_CTL1_ACK_CTS_EN Send ACK/CTS during quiet period
ConstantAR5K_QUIET_CTL1_NEXT_QT_TSF Next quiet period TSF (TU)
ConstantAR5K_QUIET_CTL1_NEXT_QT_TSF_S  
ConstantAR5K_QUIET_CTL1_QT_EN Enable quiet period
ConstantAR5K_QUIET_CTL2 Register Address
ConstantAR5K_QUIET_CTL2_QT_DUR Mask for quiet period duration
ConstantAR5K_QUIET_CTL2_QT_DUR_S  
ConstantAR5K_QUIET_CTL2_QT_PER Mask for quiet period periodicity
ConstantAR5K_QUIET_CTL2_QT_PER_S  
ConstantAR5K_RAC_PISR Read and clear PISR
ConstantAR5K_RAC_SISR0 Read and clear SISR0
ConstantAR5K_RAC_SISR1 Read and clear SISR1
ConstantAR5K_RAC_SISR2 Read and clear SISR2
ConstantAR5K_RAC_SISR3 Read and clear SISR3
ConstantAR5K_RAC_SISR4 Read and clear SISR4
MacroAR5K_RATE_ACKSIFS(_n)  
ConstantAR5K_RATE_ACKSIFS_BASE Register Address
ConstantAR5K_RATE_ACKSIFS_NORMAL Normal SIFS (field)
ConstantAR5K_RATE_ACKSIFS_TURBO Turbo SIFS (field)
MacroAR5K_RATE_DUR(_n)  
ConstantAR5K_RATE_DUR_BASE  
MacroAR5K_RATE2DB(_n)  
ConstantAR5K_RATE2DB_BASE  
MacroAR5K_REG_DISABLE_BITS(ah, _reg, _flags)  
MacroAR5K_REG_ENABLE_BITS(ah, _reg, _flags)  
MacroAR5K_REG_MASKED_BITS(ah, _reg, _flags, _mask)  
MacroAR5K_REG_MS(_val, _flags)  
MacroAR5K_REG_READ_Q(ah, _reg, _queue)  
MacroAR5K_REG_SM(_val, _flags)  
MacroAR5K_REG_WAIT(_i)  
MacroAR5K_REG_WRITE_BITS(ah, _reg, _flags, _val)  
MacroAR5K_REG_WRITE_Q(ah, _reg, _queue)  
ConstantAR5K_RESET_CTL Register Address
ConstantAR5K_RESET_CTL_BASEBAND Baseband reset [5211+]
ConstantAR5K_RESET_CTL_DMA DMA (Rx/Tx) reset [5210]
ConstantAR5K_RESET_CTL_MAC MAC reset (PCU+Baseband ?) [5210]
ConstantAR5K_RESET_CTL_PCI PCI Core reset (interrupts etc)
ConstantAR5K_RESET_CTL_PCU Protocol Control Unit reset
ConstantAR5K_RESET_CTL_PHY PHY reset [5210]
ConstantAR5K_RETRY_CNT Register Address [5210]
ConstantAR5K_RETRY_CNT_SLG Station long retry count (?)
ConstantAR5K_RETRY_CNT_SSH Station short retry count (?)
ConstantAR5K_RF_BUFFER  
ConstantAR5K_RF_BUFFER_CONTROL_0 Channel on 5110
ConstantAR5K_RF_BUFFER_CONTROL_1 Bank 7 on 5112
ConstantAR5K_RF_BUFFER_CONTROL_2 Bank 7 on 5111
ConstantAR5K_RF_BUFFER_CONTROL_3 Bank 2 on 5112
ConstantAR5K_RF_BUFFER_CONTROL_4 RF Stage register on 5110
ConstantAR5K_RF_BUFFER_CONTROL_5 Bank 3 on 5111
ConstantAR5K_RF_BUFFER_CONTROL_6 Bank 3 on 5112
MacroAR5K_RF_GAIN(_n)  
ConstantAR5K_RF_GAIN_BASE RF Amplrifier Gain table base address
ConstantAR5K_RF2316_DB_2GHZ  
ConstantAR5K_RF2316_OB_2GHZ  
ConstantAR5K_RF2413_DB_2GHZ  
ConstantAR5K_RF2413_OB_2GHZ  
ConstantAR5K_RF2425_DB_2GHZ  
ConstantAR5K_RF2425_OB_2GHZ  
ConstantAR5K_RF5111_DB_2GHZ  
ConstantAR5K_RF5111_DB_5GHZ  
ConstantAR5K_RF5111_GAIN_I  
ConstantAR5K_RF5111_MAX_TIME  
ConstantAR5K_RF5111_OB_2GHZ  
ConstantAR5K_RF5111_OB_5GHZ  
ConstantAR5K_RF5111_PLO_SEL  
MacroAR5K_RF5111_PWD(_n)  
ConstantAR5K_RF5111_PWD_XPD  
ConstantAR5K_RF5111_RFGAIN_SEL  
ConstantAR5K_RF5111_RFGAIN_STEP  
ConstantAR5K_RF5111_WAIT_I  
ConstantAR5K_RF5111_WAIT_S  
ConstantAR5K_RF5111_XPD_GAIN  
ConstantAR5K_RF5112_DB_2GHZ  
ConstantAR5K_RF5112_DB_5GHZ  
ConstantAR5K_RF5112_FIXED_BIAS_A  
ConstantAR5K_RF5112_FIXED_BIAS_B  
ConstantAR5K_RF5112_OB_2GHZ  
ConstantAR5K_RF5112_OB_5GHZ  
MacroAR5K_RF5112_PWD(_n)  
ConstantAR5K_RF5112_XPD_GAIN  
ConstantAR5K_RF5112_XPD_SEL  
ConstantAR5K_RF5112A_DB_2GHZ  
ConstantAR5K_RF5112A_DB_5GHZ  
ConstantAR5K_RF5112A_FIXED_BIAS_A  
ConstantAR5K_RF5112A_FIXED_BIAS_B  
ConstantAR5K_RF5112A_HIGH_VC_CP  
ConstantAR5K_RF5112A_LOW_VC_CP  
ConstantAR5K_RF5112A_MID_VC_CP  
ConstantAR5K_RF5112A_OB_2GHZ  
ConstantAR5K_RF5112A_OB_5GHZ  
ConstantAR5K_RF5112A_PAD2GND  
ConstantAR5K_RF5112A_PDGAINHI  
ConstantAR5K_RF5112A_PDGAINLO  
ConstantAR5K_RF5112A_PUSH_UP  
MacroAR5K_RF5112A_PWD(_n)  
ConstantAR5K_RF5112A_XB2_LVL  
ConstantAR5K_RF5112A_XB5_LVL  
ConstantAR5K_RF5112A_XPD_SEL  
ConstantAR5K_RF5112X_GAIN_I  
ConstantAR5K_RF5112X_MIXGAIN_OVR  
ConstantAR5K_RF5112X_MIXGAIN_STEP  
ConstantAR5K_RF5112X_MIXVGA_OVR  
ConstantAR5K_RF5112X_PD_DELAY_A  
ConstantAR5K_RF5112X_PD_DELAY_B  
ConstantAR5K_RF5112X_PD_DELAY_XR  
ConstantAR5K_RF5112X_PD_PERIOD_A  
ConstantAR5K_RF5112X_PD_PERIOD_B  
ConstantAR5K_RF5112X_PD_PERIOD_XR  
ConstantAR5K_RF5413_DB_2GHZ  
ConstantAR5K_RF5413_DB_5GHZ  
ConstantAR5K_RF5413_DERBY_CHAN_SEL_MODE  
ConstantAR5K_RF5413_OB_2GHZ  
ConstantAR5K_RF5413_OB_5GHZ  
ConstantAR5K_RF5413_PWD_ICLOBUF2G  
ConstantAR5K_RFCNT  
ConstantAR5K_RFCNT_M [5211+] (?)
ConstantAR5K_RFCNT_RFCL [5210]
ConstantAR5K_RPGTO  
ConstantAR5K_RPGTO_M  
ConstantAR5K_RSSI_EP_MULTIPLIER  
ConstantAR5K_RSSI_THR Register Address
ConstantAR5K_RSSI_THR_BMISS  
ConstantAR5K_RSSI_THR_BMISS_5210 Mask for Beacon Missed threshold [5210]
ConstantAR5K_RSSI_THR_BMISS_5210_S  
ConstantAR5K_RSSI_THR_BMISS_5211 Mask for Beacon Missed threshold [5211+]
ConstantAR5K_RSSI_THR_BMISS_5211_S  
ConstantAR5K_RSSI_THR_BMISS_S  
ConstantAR5K_RSSI_THR_M Mask for RSSI threshold [5211+]
ConstantAR5K_RTS_FAIL  
ConstantAR5K_RTS_FAIL_5210  
ConstantAR5K_RTS_FAIL_5211  
ConstantAR5K_RTS_OK  
ConstantAR5K_RTS_OK_5210  
ConstantAR5K_RTS_OK_5211  
ConstantAR5K_RTSD0 Register Address
ConstantAR5K_RTSD0_12 12Mb
ConstantAR5K_RTSD0_12_S  
ConstantAR5K_RTSD0_18 16Mb
ConstantAR5K_RTSD0_18_S  
ConstantAR5K_RTSD0_6 6Mb RTS duration mask (?)
ConstantAR5K_RTSD0_6_S 6Mb RTS duration shift (?)
ConstantAR5K_RTSD0_9 9Mb
ConstantAR5K_RTSD0_9_S  
ConstantAR5K_RTSD1 Register Address
ConstantAR5K_RTSD1_24 24Mb
ConstantAR5K_RTSD1_24_S  
ConstantAR5K_RTSD1_36 36Mb
ConstantAR5K_RTSD1_36_S  
ConstantAR5K_RTSD1_48 48Mb
ConstantAR5K_RTSD1_48_S  
ConstantAR5K_RTSD1_54 54Mb
ConstantAR5K_RTSD1_54_S  
ConstantAR5K_RX_DESC_ERROR0  
ConstantAR5K_RX_DESC_ERROR1_PHY_ERROR_C  
ConstantAR5K_RX_DESC_ERROR1_PHY_ERROR_C  
ConstantAR5K_RX_FILTER  
ConstantAR5K_RX_FILTER_5210 Register Address [5210]
ConstantAR5K_RX_FILTER_5211 Register Address [5211+]
ConstantAR5K_RX_FILTER_BCAST Don't filter broadcast frames
ConstantAR5K_RX_FILTER_BEACON Don't filter beacon frames
ConstantAR5K_RX_FILTER_CONTROL Don't filter control frames
ConstantAR5K_RX_FILTER_MCAST Don't filter multicast frames
ConstantAR5K_RX_FILTER_PHYERR  
ConstantAR5K_RX_FILTER_PHYERR_5211 [5211]
ConstantAR5K_RX_FILTER_PHYERR_5212 Don't filter phy errors [5212+]
ConstantAR5K_RX_FILTER_PROBEREQ Don't filter probe requests [5212+]
ConstantAR5K_RX_FILTER_PROM Set promiscuous mode
ConstantAR5K_RX_FILTER_RADARERR  
ConstantAR5K_RX_FILTER_RADARERR_5211 [5211]
ConstantAR5K_RX_FILTER_RADARERR_5212 Don't filter phy radar errors [5212+]
ConstantAR5K_RX_FILTER_UCAST Don't filter unicast frames
ConstantAR5K_RX_FILTER_XRPOLL Don't filter XR poll frame [5212+]
ConstantAR5K_RXCFG Register Address
ConstantAR5K_RXCFG_DEF_ANTENNA Default antenna (?)
ConstantAR5K_RXCFG_JUMBO_RXE Enable jumbo rx descriptors [5211+]
ConstantAR5K_RXCFG_JUMBO_WRAP Wrap jumbo frames [5211+]
ConstantAR5K_RXCFG_SDMAMW DMA size (write)
ConstantAR5K_RXCFG_SDMAMW_S  
ConstantAR5K_RXCFG_SLE_ENTRY Sleep entry policy
ConstantAR5K_RXCFG_ZLFDMA Enable Zero-length frame DMA
ConstantAR5K_RXDESC_INTREQ  
ConstantAR5K_RXDP  
ConstantAR5K_RXERR_CRC  
ConstantAR5K_RXERR_DECRYPT  
ConstantAR5K_RXERR_FIFO  
ConstantAR5K_RXERR_MIC  
ConstantAR5K_RXERR_PHY  
ConstantAR5K_RXJLA  
ConstantAR5K_RXKEYIX_INVALID  
ConstantAR5K_RXNOFRM  
ConstantAR5K_RXNOFRM_M  
ConstantAR5K_SEQ_MASK  
ConstantAR5K_SET_SHORT_PREAMBLE  
ConstantAR5K_SFR  
ConstantAR5K_SFR_EN  
ConstantAR5K_SIMR0 Register Address [5211+]
ConstantAR5K_SIMR0_QCU_TXDESC Mask for QCU_TXDESC
ConstantAR5K_SIMR0_QCU_TXDESC_S  
ConstantAR5K_SIMR0_QCU_TXOK Mask for QCU_TXOK
ConstantAR5K_SIMR0_QCU_TXOK_S  
ConstantAR5K_SIMR1 Register Address [5211+]
ConstantAR5K_SIMR1_QCU_TXEOL Mask for QCU_TXEOL
ConstantAR5K_SIMR1_QCU_TXEOL_S  
ConstantAR5K_SIMR1_QCU_TXERR Mask for QCU_TXERR
ConstantAR5K_SIMR1_QCU_TXERR_S  
ConstantAR5K_SIMR2 Register Address [5211+]
ConstantAR5K_SIMR2_BCN_TIMEOUT Beacon Timeout [5212+]
ConstantAR5K_SIMR2_CAB_END [5212+]
ConstantAR5K_SIMR2_CAB_TIMEOUT CAB Timeout [5212+]
ConstantAR5K_SIMR2_DPERR Bus parity error
ConstantAR5K_SIMR2_DTIM [5212+]
ConstantAR5K_SIMR2_DTIM_SYNC DTIM Sync lost [5212+]
ConstantAR5K_SIMR2_MCABT Master Cycle Abort
ConstantAR5K_SIMR2_QCU_TXURN Mask for QCU_TXURN
ConstantAR5K_SIMR2_QCU_TXURN_S  
ConstantAR5K_SIMR2_SSERR Signaled System Error
ConstantAR5K_SIMR2_TIM [5212+]
ConstantAR5K_SIMR2_TSFOOR TSF OOR (?)
ConstantAR5K_SIMR3 Register Address [5211+]
ConstantAR5K_SIMR3_QCBRORN Mask for QCBRORN
ConstantAR5K_SIMR3_QCBRORN_S  
ConstantAR5K_SIMR3_QCBRURN Mask for QCBRURN
ConstantAR5K_SIMR3_QCBRURN_S  
ConstantAR5K_SIMR4 Register Address [5211+]
ConstantAR5K_SIMR4_QTRIG Mask for QTRIG
ConstantAR5K_SIMR4_QTRIG_S  
ConstantAR5K_SISR0 Register Address [5211+]
ConstantAR5K_SISR0_QCU_TXDESC Mask for QCU_TXDESC
ConstantAR5K_SISR0_QCU_TXDESC_S  
ConstantAR5K_SISR0_QCU_TXOK Mask for QCU_TXOK
ConstantAR5K_SISR0_QCU_TXOK_S  
ConstantAR5K_SISR1 Register Address [5211+]
ConstantAR5K_SISR1_QCU_TXEOL Mask for QCU_TXEOL
ConstantAR5K_SISR1_QCU_TXEOL_S  
ConstantAR5K_SISR1_QCU_TXERR Mask for QCU_TXERR
ConstantAR5K_SISR1_QCU_TXERR_S  
ConstantAR5K_SISR2 Register Address [5211+]
ConstantAR5K_SISR2_BCN_TIMEOUT Beacon Timeout [5212+]
ConstantAR5K_SISR2_CAB_END [5212+]
ConstantAR5K_SISR2_CAB_TIMEOUT CAB Timeout [5212+]
ConstantAR5K_SISR2_DPERR Bus parity error
ConstantAR5K_SISR2_DTIM [5212+]
ConstantAR5K_SISR2_DTIM_SYNC DTIM sync lost [5212+]
ConstantAR5K_SISR2_MCABT Master Cycle Abort
ConstantAR5K_SISR2_QCU_TXURN Mask for QCU_TXURN
ConstantAR5K_SISR2_QCU_TXURN_S  
ConstantAR5K_SISR2_SSERR Signaled System Error
ConstantAR5K_SISR2_TIM [5212+]
ConstantAR5K_SISR2_TSFOOR TSF OOR (?)
ConstantAR5K_SISR3 Register Address [5211+]
ConstantAR5K_SISR3_QCBRORN Mask for QCBRORN
ConstantAR5K_SISR3_QCBRORN_S  
ConstantAR5K_SISR3_QCBRURN Mask for QCBRURN
ConstantAR5K_SISR3_QCBRURN_S  
ConstantAR5K_SISR4 Register Address [5211+]
ConstantAR5K_SISR4_QTRIG Mask for QTRIG
ConstantAR5K_SISR4_QTRIG_S  
ConstantAR5K_SLEEP_CTL Register Address
ConstantAR5K_SLEEP_CTL_DUR_TIM_POL Sleep duration timing policy
ConstantAR5K_SLEEP_CTL_DUR_WRITE_POL Sleep duration write policy
ConstantAR5K_SLEEP_CTL_SLDUR Sleep duration mask
ConstantAR5K_SLEEP_CTL_SLDUR_S  
ConstantAR5K_SLEEP_CTL_SLE Sleep enable mask
ConstantAR5K_SLEEP_CTL_SLE_ALLOW Normal sleep policy
ConstantAR5K_SLEEP_CTL_SLE_POL Sleep policy mode
ConstantAR5K_SLEEP_CTL_SLE_S  
ConstantAR5K_SLEEP_CTL_SLE_SLP Force chip sleep
ConstantAR5K_SLEEP_CTL_SLE_UNITS [5211+]
ConstantAR5K_SLEEP_CTL_SLE_WAKE Force chip awake
ConstantAR5K_SLEEP0 Register Address
ConstantAR5K_SLEEP0_ASSUME_DTIM Assume DTIM
ConstantAR5K_SLEEP0_CABTO Mask for CAB Time Out
ConstantAR5K_SLEEP0_CABTO_S  
ConstantAR5K_SLEEP0_ENH_SLEEP_EN Enable enchanced sleep control
ConstantAR5K_SLEEP0_NEXT_DTIM Mask for next DTIM (?)
ConstantAR5K_SLEEP0_NEXT_DTIM_S  
ConstantAR5K_SLEEP1 Register Address
ConstantAR5K_SLEEP1_BEACON_TO Mask for Beacon Time Out
ConstantAR5K_SLEEP1_BEACON_TO_S  
ConstantAR5K_SLEEP1_NEXT_TIM Mask for next TIM (?)
ConstantAR5K_SLEEP1_NEXT_TIM_S  
ConstantAR5K_SLEEP2 Register Address
ConstantAR5K_SLEEP2_DTIM_PER Mask for DTIM period (?)
ConstantAR5K_SLEEP2_DTIM_PER_S  
ConstantAR5K_SLEEP2_TIM_PER Mask for TIM period (?)
ConstantAR5K_SLEEP2_TIM_PER_S  
ConstantAR5K_SLOT_TIME  
ConstantAR5K_SLOT_TIME_20  
ConstantAR5K_SLOT_TIME_9  
ConstantAR5K_SLOT_TIME_MAX  
ConstantAR5K_SOFTLED_OFF  
ConstantAR5K_SOFTLED_ON  
ConstantAR5K_SOFTLED_PIN  
ConstantAR5K_SREV Register Address
ConstantAR5K_SREV_AR2413 Griffin lite
ConstantAR5K_SREV_AR2414 Griffin
ConstantAR5K_SREV_AR2415 Talon
ConstantAR5K_SREV_AR2417 Nala
ConstantAR5K_SREV_AR2425 Swan
ConstantAR5K_SREV_AR5210 Crete
ConstantAR5K_SREV_AR5211 Oahu
ConstantAR5K_SREV_AR5212 Venice
ConstantAR5K_SREV_AR5213 ???
ConstantAR5K_SREV_AR5213A Hainan
ConstantAR5K_SREV_AR5311 Maui 1
ConstantAR5K_SREV_AR5311A Maui 2
ConstantAR5K_SREV_AR5311B Spirit
ConstantAR5K_SREV_AR5413 Eagle lite
ConstantAR5K_SREV_AR5414 Eagle
ConstantAR5K_SREV_AR5416 PCI-E
ConstantAR5K_SREV_AR5418 PCI-E
ConstantAR5K_SREV_AR5424 Condor
ConstantAR5K_SREV_PHY_2413  
ConstantAR5K_SREV_PHY_2425  
ConstantAR5K_SREV_PHY_5211  
ConstantAR5K_SREV_PHY_5212  
ConstantAR5K_SREV_PHY_5212A  
ConstantAR5K_SREV_PHY_5212B  
ConstantAR5K_SREV_PHY_5413  
ConstantAR5K_SREV_RAD_2111  
ConstantAR5K_SREV_RAD_2112  
ConstantAR5K_SREV_RAD_2112A  
ConstantAR5K_SREV_RAD_2112B  
ConstantAR5K_SREV_RAD_2316 Cobra SoC
ConstantAR5K_SREV_RAD_2317  
ConstantAR5K_SREV_RAD_2413  
ConstantAR5K_SREV_RAD_2425  
ConstantAR5K_SREV_RAD_5110  
ConstantAR5K_SREV_RAD_5111  
ConstantAR5K_SREV_RAD_5111A  
ConstantAR5K_SREV_RAD_5112  
ConstantAR5K_SREV_RAD_5112A  
ConstantAR5K_SREV_RAD_5112B  
ConstantAR5K_SREV_RAD_5133  
ConstantAR5K_SREV_RAD_5413  
ConstantAR5K_SREV_RAD_5424 Mostly same as 5413
ConstantAR5K_SREV_REV Mask for revision
ConstantAR5K_SREV_REV_S  
ConstantAR5K_SREV_UNKNOWN  
ConstantAR5K_SREV_VER Mask for version
ConstantAR5K_SREV_VER_S  
ConstantAR5K_STA_ID0  
ConstantAR5K_STA_ID0_ARRD_L32  
ConstantAR5K_STA_ID1 Register Address
ConstantAR5K_STA_ID1_ACKCTS_6MB Use 6Mbit/s for ACK/CTS
ConstantAR5K_STA_ID1_ADDR_U16 Upper 16 bits of MAC addres
ConstantAR5K_STA_ID1_ADHOC Set Ad-Hoc mode
ConstantAR5K_STA_ID1_AP Set AP mode
ConstantAR5K_STA_ID1_BASE_RATE_11B Use 11b base rate for ACK/CTS [5211+]
ConstantAR5K_STA_ID1_CBCIV_ENDIAN ???
ConstantAR5K_STA_ID1_CRYPT_MIC_EN Enable MIC
ConstantAR5K_STA_ID1_DEFAULT_ANTENNA Use default antenna
ConstantAR5K_STA_ID1_DESC_ANTENNA Update antenna from descriptor
ConstantAR5K_STA_ID1_KEYSRCH_MCAST Do key cache search for mcast frames
ConstantAR5K_STA_ID1_KEYSRCH_MODE Look up key when key id != 0
ConstantAR5K_STA_ID1_NO_KEYSRCH No key search
ConstantAR5K_STA_ID1_NO_PSPOLL No power save polling [5210]
ConstantAR5K_STA_ID1_PCF  
ConstantAR5K_STA_ID1_PCF_5210 Enable PCF on [5210]
ConstantAR5K_STA_ID1_PCF_5211 Enable PCF on [5211+]
ConstantAR5K_STA_ID1_PRESERVE_SEQ_NUM Preserve sequence number
ConstantAR5K_STA_ID1_PWR_SV Power save reporting
ConstantAR5K_STA_ID1_RTS_DEF_ANTENNA Use default antenna for RTS
ConstantAR5K_STA_ID1_SELFGEN_DEF_ANT Use def. antenna for self generated frames
ConstantAR5K_TIME_OUT Register Address
ConstantAR5K_TIME_OUT_ACK ACK timeout mask
ConstantAR5K_TIME_OUT_ACK_S  
ConstantAR5K_TIME_OUT_CTS CTS timeout mask
ConstantAR5K_TIME_OUT_CTS_S  
ConstantAR5K_TIMER0  
ConstantAR5K_TIMER0_5210  
ConstantAR5K_TIMER0_5211  
ConstantAR5K_TIMER1  
ConstantAR5K_TIMER1_5210  
ConstantAR5K_TIMER1_5211  
ConstantAR5K_TIMER2  
ConstantAR5K_TIMER2_5210  
ConstantAR5K_TIMER2_5211  
ConstantAR5K_TIMER3  
ConstantAR5K_TIMER3_5210  
ConstantAR5K_TIMER3_5211  
ConstantAR5K_TOPS  
ConstantAR5K_TOPS_M  
ConstantAR5K_TPC  
ConstantAR5K_TPC_ACK ack frames
ConstantAR5K_TPC_ACK_S  
ConstantAR5K_TPC_CHIRP chirp frames
ConstantAR5K_TPC_CHIRP_S  
ConstantAR5K_TPC_CTS cts frames
ConstantAR5K_TPC_CTS_S  
ConstantAR5K_TPC_DOPPLER doppler chirp span
ConstantAR5K_TPC_DOPPLER_S  
ConstantAR5K_TRIG_LVL  
ConstantAR5K_TSF_L32  
ConstantAR5K_TSF_L32_5210  
ConstantAR5K_TSF_L32_5211  
ConstantAR5K_TSF_PARM Register Address
ConstantAR5K_TSF_PARM_INC Mask for TSF increment
ConstantAR5K_TSF_PARM_INC_S  
ConstantAR5K_TSF_THRES  
ConstantAR5K_TSF_U32  
ConstantAR5K_TSF_U32_5210  
ConstantAR5K_TSF_U32_5211  
ConstantAR5K_TUNE_ADDITIONAL_SWBA_BACKO  
ConstantAR5K_TUNE_AIFS  
ConstantAR5K_TUNE_AIFS_11B  
ConstantAR5K_TUNE_AIFS_XR  
ConstantAR5K_TUNE_ANT_DIVERSITY  
ConstantAR5K_TUNE_BEACON_INTERVAL  
ConstantAR5K_TUNE_BMISS_THRES  
ConstantAR5K_TUNE_CWMAX  
ConstantAR5K_TUNE_CWMAX_11B  
ConstantAR5K_TUNE_CWMAX_XR  
ConstantAR5K_TUNE_CWMIN  
ConstantAR5K_TUNE_CWMIN_11B  
ConstantAR5K_TUNE_CWMIN_XR  
ConstantAR5K_TUNE_DEFAULT_TXPOWER  
ConstantAR5K_TUNE_DMA_BEACON_RESP  
ConstantAR5K_TUNE_HWTXTRIES  
ConstantAR5K_TUNE_MAX_TX_FIFO_THRES  
ConstantAR5K_TUNE_MAX_TXPOWER  
ConstantAR5K_TUNE_MIN_TX_FIFO_THRES  
ConstantAR5K_TUNE_NOISE_FLOOR  
ConstantAR5K_TUNE_RADAR_ALERT  
ConstantAR5K_TUNE_REGISTER_DWELL_TIME  
ConstantAR5K_TUNE_REGISTER_TIMEOUT  
ConstantAR5K_TUNE_RSSI_THRES  
ConstantAR5K_TUNE_SW_BEACON_RESP  
ConstantAR5K_TUNE_TPC_TXPOWER  
ConstantAR5K_TX_MASK0  
ConstantAR5K_TX_MASK1  
ConstantAR5K_TXCFG Register Address
ConstantAR5K_TXCFG_ADHOC_BCN_ATIM Adhoc Beacon ATIM Policy
ConstantAR5K_TXCFG_ATIM_WINDOW_DEF_DIS Disable ATIM window defer [5211+]
ConstantAR5K_TXCFG_B_MODE Set b mode for 5111 (enable 2111)
ConstantAR5K_TXCFG_DCU_CACHING_DIS Disable DCU caching
ConstantAR5K_TXCFG_DCU_DBL_BUF_DIS Disable double buffering on DCU
ConstantAR5K_TXCFG_DMASIZE Flag for passing DMA size [5210]
ConstantAR5K_TXCFG_FRMPAD_DIS [5211+]
ConstantAR5K_TXCFG_JUMBO_DESC_EN Enable jumbo tx descriptors [5211+]
ConstantAR5K_TXCFG_JUMBO_FRM_MODE Jumbo frame mode [5211+]
ConstantAR5K_TXCFG_RDY_CBR_DIS Ready time CBR disable [5211+]
ConstantAR5K_TXCFG_RTSRND [5211+]
ConstantAR5K_TXCFG_SDMAMR DMA size (read)
ConstantAR5K_TXCFG_SDMAMR_S  
ConstantAR5K_TXCFG_TXCONT_EN  
ConstantAR5K_TXCFG_TXFSTP TX DMA full Stop [5210]
ConstantAR5K_TXCFG_TXFULL TX Triger level mask
ConstantAR5K_TXCFG_TXFULL_0B  
ConstantAR5K_TXCFG_TXFULL_128B  
ConstantAR5K_TXCFG_TXFULL_192B  
ConstantAR5K_TXCFG_TXFULL_256B  
ConstantAR5K_TXCFG_TXFULL_64B  
ConstantAR5K_TXCFG_TXFULL_S  
ConstantAR5K_TXDESC_CLRDMASK  
ConstantAR5K_TXDESC_CTSENA  
ConstantAR5K_TXDESC_INTREQ  
ConstantAR5K_TXDESC_NOACK [5211+]
ConstantAR5K_TXDESC_RTSENA  
ConstantAR5K_TXDESC_VEOL [5211+]
ConstantAR5K_TXEPOST  
ConstantAR5K_TXERR_FIFO  
ConstantAR5K_TXERR_FILT  
ConstantAR5K_TXERR_XRETRY  
ConstantAR5K_TXKEYIX_INVALID  
ConstantAR5K_TXNOFRM  
ConstantAR5K_TXNOFRM_M  
ConstantAR5K_TXNOFRM_QCU  
ConstantAR5K_TXNOFRM_QCU_S  
ConstantAR5K_TXPC Register Address
ConstantAR5K_TXPC_ACK_M ACK tx power
ConstantAR5K_TXPC_ACK_S  
ConstantAR5K_TXPC_CHIRP_M CHIRP tx power
ConstantAR5K_TXPC_CHIRP_S  
ConstantAR5K_TXPC_CTS_M CTS tx power
ConstantAR5K_TXPC_CTS_S  
ConstantAR5K_TXPC_DOPPLER Doppler chirp span (?)
ConstantAR5K_TXPC_DOPPLER_S  
MacroAR5K_TXPOWER_CCK(_r, _v)  
MacroAR5K_TXPOWER_OFDM(_r, _v)  
ConstantAR5K_TXQ_FLAG_BACKOFF_DISABLE Disable random post-backoff
ConstantAR5K_TXQ_FLAG_CBRORNINT_ENABLE Enable CBRORN interrupt
ConstantAR5K_TXQ_FLAG_CBRURNINT_ENABLE Enable CBRURN interrupt
ConstantAR5K_TXQ_FLAG_COMPRESSION_ENABL Enable hw compression -not implemented-
ConstantAR5K_TXQ_FLAG_FRAG_BURST_BACKOF Enable backoff while bursting
ConstantAR5K_TXQ_FLAG_POST_FR_BKOFF_DIS Disable backoff while bursting
ConstantAR5K_TXQ_FLAG_QTRIGINT_ENABLE Enable QTRIG interrupt
ConstantAR5K_TXQ_FLAG_RDYTIME_EXP_POLIC Enable ready time expiry policy (?)
ConstantAR5K_TXQ_FLAG_TXDESCINT_ENABLE Enable TXDESC interrupt -not used-
ConstantAR5K_TXQ_FLAG_TXEOLINT_ENABLE Enable TXEOL interrupt -not used-
ConstantAR5K_TXQ_FLAG_TXERRINT_ENABLE Enable TXERR interrupt
ConstantAR5K_TXQ_FLAG_TXNOFRMINT_ENABLE Enable TXNOFRM interrupt
ConstantAR5K_TXQ_FLAG_TXOKINT_ENABLE Enable TXOK interrupt
ConstantAR5K_TXQ_FLAG_TXURNINT_ENABLE Enable TXURN interrupt
ConstantAR5K_TXQ_USEDEFAULT  
ConstantAR5K_TXSTAT_ALTRATE  
ConstantAR5K_USEC  
ConstantAR5K_USEC_1 clock cycles for 1us
ConstantAR5K_USEC_1_S  
ConstantAR5K_USEC_32 clock cycles for 1us while on 32Mhz clock
ConstantAR5K_USEC_32_S  
ConstantAR5K_USEC_5210 Register Address [5210]
ConstantAR5K_USEC_5211 Register Address [5211+]
ConstantAR5K_USEC_RX_LATENCY_5210 also for 5311
ConstantAR5K_USEC_RX_LATENCY_5210_S  
ConstantAR5K_USEC_RX_LATENCY_5211  
ConstantAR5K_USEC_RX_LATENCY_5211_S  
ConstantAR5K_USEC_TX_LATENCY_5210 also for 5311
ConstantAR5K_USEC_TX_LATENCY_5210_S  
ConstantAR5K_USEC_TX_LATENCY_5211  
ConstantAR5K_USEC_TX_LATENCY_5211_S  
ConstantAR5K_WOW_PAT_DATA Register Address
ConstantAR5K_WOW_PAT_DATA_0_3_M Pattern 0, 3 mask
ConstantAR5K_WOW_PAT_DATA_0_3_V Pattern 0, 3 value
ConstantAR5K_WOW_PAT_DATA_1_4_M Pattern 1, 4 mask
ConstantAR5K_WOW_PAT_DATA_1_4_V Pattern 1, 4 value
ConstantAR5K_WOW_PAT_DATA_2_5_M Pattern 2, 5 mask
ConstantAR5K_WOW_PAT_DATA_2_5_V Pattern 2, 5 value
ConstantAR5K_WOW_PAT_IDX  
ConstantAR5K_WOW_PCFG Register Address
ConstantAR5K_WOW_PCFG_LONG_FRAME_POL Long frame policy
ConstantAR5K_WOW_PCFG_PAT_0_EN Enable pattern 0
ConstantAR5K_WOW_PCFG_PAT_1_EN Enable pattern 1
ConstantAR5K_WOW_PCFG_PAT_2_EN Enable pattern 2
ConstantAR5K_WOW_PCFG_PAT_3_EN Enable pattern 3
ConstantAR5K_WOW_PCFG_PAT_4_EN Enable pattern 4
ConstantAR5K_WOW_PCFG_PAT_5_EN Enable pattern 5
ConstantAR5K_WOW_PCFG_PAT_MATCH_EN Pattern match enable
ConstantAR5K_WOW_PCFG_WOBMISS Wake on bea(con) miss (?)
ConstantAR5K_XRCHIRP Register Address
ConstantAR5K_XRCHIRP_GAP Mask for CHIRP gap (?)
ConstantAR5K_XRCHIRP_SEND Send CHIRP
ConstantAR5K_XRDELAY Register Address
ConstantAR5K_XRDELAY_CHIRP_DELAY_M Mask for CHIRP data delay
ConstantAR5K_XRDELAY_CHIRP_DELAY_S  
ConstantAR5K_XRDELAY_SLOT_DELAY_M Mask for slot delay
ConstantAR5K_XRDELAY_SLOT_DELAY_S  
ConstantAR5K_XRLAT_TX  
ConstantAR5K_XRMODE Register Address
ConstantAR5K_XRMODE_FRAME_HOLD_M Mask for frame hold (?)
ConstantAR5K_XRMODE_FRAME_HOLD_S  
ConstantAR5K_XRMODE_POLL_SUBTYPE_M Mask for Poll subtype (?)
ConstantAR5K_XRMODE_POLL_SUBTYPE_S  
ConstantAR5K_XRMODE_POLL_TYPE_M Mask for Poll type (?)
ConstantAR5K_XRMODE_POLL_TYPE_S  
ConstantAR5K_XRMODE_POLL_WAIT_ALL Wait for poll
ConstantAR5K_XRMODE_SIFS_DELAY Mask for SIFS delay
ConstantAR5K_XRSTOMP Register Address
ConstantAR5K_XRSTOMP_DATA Stomp data (?)
ConstantAR5K_XRSTOMP_RSSI_THRES Mask for XR RSSI threshold
ConstantAR5K_XRSTOMP_RX Stomp Rx (?)
ConstantAR5K_XRSTOMP_TX Stomp Tx (?)
ConstantAR5K_XRSTOMP_TX_BSSID Stomp Tx BSSID (?)
ConstantAR5K_XRSTOMP_TX_RSSI Stomp Tx RSSI (?)
ConstantAR5K_XRTIMEOUT Register Address
ConstantAR5K_XRTIMEOUT_CHIRP_M Mask for CHIRP timeout
ConstantAR5K_XRTIMEOUT_CHIRP_S  
ConstantAR5K_XRTIMEOUT_POLL_M Mask for Poll timeout
ConstantAR5K_XRTIMEOUT_POLL_S  
Structurearbel  
SourceFilearbel.c  
SourceFilearbel.h  
Staticarbel_alloc_icm Allocate ICM
Staticarbel_alloc_qn_offset @file
MacroARBEL_BITMASK_SIZE(max_entries)  
Staticarbel_close Close Infiniband link
Staticarbel_cmd Issue HCA command
Inlinearbel_cmd_2rst_qpee  
Inlinearbel_cmd_close_hca  
Inlinearbel_cmd_close_ib  
Inlinearbel_cmd_disable_lam  
Inlinearbel_cmd_enable_lam  
Inlinearbel_cmd_hw2sw_cq  
Inlinearbel_cmd_hw2sw_eq  
Inlinearbel_cmd_init_hca  
Inlinearbel_cmd_init_ib  
Inlinearbel_cmd_init2rtr_qpee  
Inlinearbel_cmd_mad_ifc  
Inlinearbel_cmd_map_eq  
Inlinearbel_cmd_map_fa  
Inlinearbel_cmd_map_icm  
Inlinearbel_cmd_map_icm_aux  
Inlinearbel_cmd_mgid_hash  
Inlinearbel_cmd_query_dev_lim  
Inlinearbel_cmd_query_fw  
Inlinearbel_cmd_read_mgm  
Inlinearbel_cmd_rst2init_qpee  
Inlinearbel_cmd_rtr2rts_qpee  
Inlinearbel_cmd_rts2rts_qp  
Inlinearbel_cmd_run_fw  
Inlinearbel_cmd_set_icm_size  
Inlinearbel_cmd_sw2hw_cq  
Inlinearbel_cmd_sw2hw_eq  
Inlinearbel_cmd_sw2hw_mpt  
Inlinearbel_cmd_unmap_fa  
Inlinearbel_cmd_unmap_icm  
Inlinearbel_cmd_unmap_icm_aux  
Staticarbel_cmd_wait HCA commands
Inlinearbel_cmd_write_mgm  
Staticarbel_complete Handle completion
Structurearbel_completion_queue  
Staticarbel_create_cq Completion queue operations
Staticarbel_create_eq Event queues
Staticarbel_create_qp Create queue pair
Staticarbel_create_recv_wq Create receive work queue
Staticarbel_create_send_wq Queue pair operations
MacroARBEL_DB_EQ_OFFSET(_eqn)  
ConstantARBEL_DB_POST_SND_OFFSET  
Staticarbel_destroy_cq Destroy completion queue
Staticarbel_destroy_eq Destroy event queue
Staticarbel_destroy_qp Destroy queue pair
Structurearbel_dev_limits  
ConstantARBEL_EV_PORT_STATE_CHANGE  
Staticarbel_event_port_state_change Handle port state event
Structurearbel_event_queue  
Staticarbel_free_icm Free ICM
Staticarbel_free_qn_offset Free queue number
Staticarbel_get_limits Infinihost Context Memory management
ConstantARBEL_GLOBAL_PD  
ConstantARBEL_GROUP_SEPARATOR_DOORBELL  
ConstantARBEL_HCR_2RST_QPEE  
ConstantARBEL_HCR_BASE  
ConstantARBEL_HCR_CLOSE_HCA  
ConstantARBEL_HCR_CLOSE_IB  
ConstantARBEL_HCR_DISABLE_LAM  
ConstantARBEL_HCR_ENABLE_LAM  
ConstantARBEL_HCR_HW2SW_CQ  
ConstantARBEL_HCR_HW2SW_EQ  
MacroARBEL_HCR_IN_CMD( _opcode, _in_mbox, _in_len )  
MacroARBEL_HCR_IN_LEN( _command )  
ConstantARBEL_HCR_IN_MBOX  
ConstantARBEL_HCR_INIT_HCA  
ConstantARBEL_HCR_INIT_IB  
ConstantARBEL_HCR_INIT2RTR_QPEE  
MacroARBEL_HCR_INOUT_CMD( _opcode, _in_mbox, _in_len, \ _out_mbox, _out_len )  
ConstantARBEL_HCR_MAD_IFC  
ConstantARBEL_HCR_MAP_EQ  
ConstantARBEL_HCR_MAP_FA  
ConstantARBEL_HCR_MAP_ICM  
ConstantARBEL_HCR_MAP_ICM_AUX  
ConstantARBEL_HCR_MAX_WAIT_MS  
ConstantARBEL_HCR_MGID_HASH  
MacroARBEL_HCR_OPCODE( _command )  
MacroARBEL_HCR_OUT_CMD( _opcode, _out_mbox, _out_len )  
MacroARBEL_HCR_OUT_LEN( _command )  
ConstantARBEL_HCR_OUT_MBOX  
ConstantARBEL_HCR_QUERY_DEV_LIM  
ConstantARBEL_HCR_QUERY_FW  
ConstantARBEL_HCR_READ_MGM  
MacroARBEL_HCR_REG(x)  
ConstantARBEL_HCR_RST2INIT_QPEE  
ConstantARBEL_HCR_RTR2RTS_QPEE  
ConstantARBEL_HCR_RTS2RTS_QPEE  
ConstantARBEL_HCR_RUN_FW  
ConstantARBEL_HCR_SET_ICM_SIZE  
ConstantARBEL_HCR_SW2HW_CQ  
ConstantARBEL_HCR_SW2HW_EQ  
ConstantARBEL_HCR_SW2HW_MPT  
ConstantARBEL_HCR_UNMAP_FA  
ConstantARBEL_HCR_UNMAP_ICM  
ConstantARBEL_HCR_UNMAP_ICM_AUX  
MacroARBEL_HCR_VOID_CMD( _opcode )  
ConstantARBEL_HCR_WRITE_MGM  
ConstantARBEL_INVALID_LKEY  
Staticarbel_mad MAD operations
ConstantARBEL_MAP_EQ  
ConstantARBEL_MAX_CQS  
ConstantARBEL_MAX_DOORBELL_RECORDS  
ConstantARBEL_MAX_EQS  
ConstantARBEL_MAX_GATHER  
ConstantARBEL_MAX_QPS  
ConstantARBEL_MAX_SCATTER  
ConstantARBEL_MBOX_ALIGN  
ConstantARBEL_MBOX_SIZE  
Staticarbel_mcast_attach Multicast group operations
Staticarbel_mcast_detach Detach from multicast group
ConstantARBEL_MKEY_PREFIX  
Staticarbel_modify_qp Modify queue pair
ConstantARBEL_MTU_2048  
ConstantARBEL_NO_EQ  
ConstantARBEL_NUM_EQES  
ConstantARBEL_NUM_PORTS  
ConstantARBEL_OPCODE_RECV_ERROR  
ConstantARBEL_OPCODE_SEND  
ConstantARBEL_OPCODE_SEND_ERROR  
Staticarbel_open Infiniband link-layer operations
ConstantARBEL_PAGE_SIZE  
ConstantARBEL_PCI_CONFIG_BAR  
ConstantARBEL_PCI_CONFIG_BAR_SIZE  
ConstantARBEL_PCI_UAR_BAR  
ConstantARBEL_PCI_UAR_IDX  
ConstantARBEL_PCI_UAR_SIZE  
Staticarbel_poll_cq Poll completion queue
Staticarbel_poll_eq Poll event queue
ConstantARBEL_PORT_BASE  
Staticarbel_post_recv Post receive work queue entry
Staticarbel_post_send Post send work queue entry
Staticarbel_probe Probe PCI device
ConstantARBEL_QPEE_OPT_PARAM_QKEY  
ConstantARBEL_QPN_BASE  
Structurearbel_queue_pair  
Structurearbel_recv_work_queue  
Unionarbel_recv_wqe  
ConstantARBEL_RECV_WQE_ALIGN  
Staticarbel_remove Remove PCI device
Staticarbel_ring_doorbell Work request operations
Structurearbel_send_work_queue  
Unionarbel_send_wqe  
ConstantARBEL_SEND_WQE_ALIGN  
Staticarbel_setup_mpt PCI interface
ConstantARBEL_ST_UD  
Staticarbel_start_firmware Firmware control
Staticarbel_stop_firmware Stop firmware running
ConstantARBEL_UAR_RES_CQ_ARM  
ConstantARBEL_UAR_RES_CQ_CI  
ConstantARBEL_UAR_RES_GROUP_SEP  
ConstantARBEL_UAR_RES_NONE  
ConstantARBEL_UAR_RES_RQ  
ConstantARBEL_UAR_RES_SQ  
ConstantARBEL_UNMAP_EQ  
Structurearbelprm_access_lam_inject_errors_input_modifier_st Little Endian
Structurearbelprm_access_lam_inject_errors_input_modifier_st Little Endian
Structurearbelprm_access_lam_inject_errors_input_parameter_st Little Endian
Structurearbelprm_access_lam_inject_errors_input_parameter_st Little Endian
Structurearbelprm_access_lam_inject_errors_st Little Endian
Structurearbelprm_access_lam_inject_errors_st Little Endian
Structurearbelprm_access_lam_st Little Endian
Structurearbelprm_access_lam_st Little Endian
Structurearbelprm_address_path_st Little Endian
Structurearbelprm_address_path_st Little Endian
Structurearbelprm_arbel_prm_st Little Endian
Structurearbelprm_arbel_prm_st Little Endian
Structurearbelprm_clr_int_st Little Endian
Structurearbelprm_clr_int_st Little Endian
Unionarbelprm_completion_entry  
Structurearbelprm_completion_event_st Little Endian
Structurearbelprm_completion_event_st Little Endian
Structurearbelprm_completion_queue_context_st Little Endian
Structurearbelprm_completion_queue_context_st Little Endian
Structurearbelprm_completion_queue_entry_st Little Endian
Structurearbelprm_completion_queue_entry_st Little Endian
Structurearbelprm_completion_queue_error_st Little Endian
Structurearbelprm_completion_queue_error_st Little Endian
Structurearbelprm_completion_with_error_st Little Endian
Structurearbelprm_completion_with_error_st Little Endian
Structurearbelprm_configuration_registers_st Little Endian
Structurearbelprm_configuration_registers_st Little Endian
Structurearbelprm_cq_arm_db_record_st Little Endian
Structurearbelprm_cq_arm_db_record_st Little Endian
Structurearbelprm_cq_ci_db_record_st Little Endian
Structurearbelprm_cq_ci_db_record_st Little Endian
Structurearbelprm_cq_cmd_doorbell_st Little Endian
Structurearbelprm_cq_cmd_doorbell_st Little Endian
Structurearbelprm_dimminfo_st Little Endian
Structurearbelprm_dimminfo_st Little Endian
Unionarbelprm_doorbell_record  
Unionarbelprm_doorbell_register  
Structurearbelprm_ecc_detect_event_data_st Little Endian
Structurearbelprm_ecc_detect_event_data_st Little Endian
Structurearbelprm_enable_lam_st Little Endian
Structurearbelprm_enable_lam_st Little Endian
Structurearbelprm_eq_arm_db_region_st Little Endian
Structurearbelprm_eq_arm_db_region_st Little Endian
Structurearbelprm_eq_cmd_doorbell_st Little Endian
Structurearbelprm_eq_cmd_doorbell_st Little Endian
Unionarbelprm_eq_doorbell_register  
Structurearbelprm_eq_set_ci_st  
Structurearbelprm_eq_set_ci_table_st Little Endian
Structurearbelprm_eq_set_ci_table_st Little Endian
Structurearbelprm_eqc_st Little Endian
Structurearbelprm_eqc_st Little Endian
Unionarbelprm_event_entry  
Structurearbelprm_event_mask_st  
Structurearbelprm_event_queue_entry_st Little Endian
Structurearbelprm_event_queue_entry_st Little Endian
Structurearbelprm_extended_completion_queue_entry_st Little Endian
Structurearbelprm_extended_completion_queue_entry_st Little Endian
Structurearbelprm_fast_registration_segment_st Little Endian
Structurearbelprm_fast_registration_segment_st Little Endian
Structurearbelprm_gpio_event_data_st Little Endian
Structurearbelprm_gpio_event_data_st Little Endian
Structurearbelprm_hca_command_register_st Little Endian
Structurearbelprm_hca_command_register_st Little Endian
Structurearbelprm_hcr_completion_event_st Little Endian
Structurearbelprm_hcr_completion_event_st Little Endian
Structurearbelprm_header_log_register_st Little Endian
Structurearbelprm_header_log_register_st Little Endian
Structurearbelprm_init_hca_st Little Endian
Structurearbelprm_init_hca_st Little Endian
Structurearbelprm_init_ib_st Little Endian
Structurearbelprm_init_ib_st Little Endian
Structurearbelprm_lam_en_out_param_st Little Endian
Structurearbelprm_lam_en_out_param_st Little Endian
Structurearbelprm_local_invalidate_segment_st Little Endian
Structurearbelprm_local_invalidate_segment_st Little Endian
Unionarbelprm_mad  
Structurearbelprm_mad_ifc_input_modifier_st Little Endian
Structurearbelprm_mad_ifc_input_modifier_st Little Endian
Structurearbelprm_mad_ifc_st Little Endian
Structurearbelprm_mad_ifc_st Little Endian
Structurearbelprm_mgm_entry_st Little Endian
Structurearbelprm_mgm_entry_st Little Endian
Structurearbelprm_mgm_hash_st  
Structurearbelprm_mgmqp_st Little Endian
Structurearbelprm_mgmqp_st Little Endian
Structurearbelprm_misc_counters_st Little Endian
Structurearbelprm_misc_counters_st Little Endian
Structurearbelprm_mod_stat_cfg_st Little Endian
Structurearbelprm_mod_stat_cfg_st Little Endian
Structurearbelprm_mpt_st Little Endian
Structurearbelprm_mpt_st Little Endian
Structurearbelprm_mt25208_type0_st Little Endian
Structurearbelprm_mt25208_type0_st Little Endian
Structurearbelprm_mtt_st Little Endian
Structurearbelprm_mtt_st Little Endian
Structurearbelprm_multicastparam_st Little Endian
Structurearbelprm_multicastparam_st Little Endian
Structurearbelprm_page_fault_event_data_st Little Endian
Structurearbelprm_page_fault_event_data_st Little Endian
Structurearbelprm_pbl_st Little Endian
Structurearbelprm_pbl_st Little Endian
Structurearbelprm_performance_counters_st Little Endian
Structurearbelprm_performance_counters_st Little Endian
Structurearbelprm_performance_monitor_event_st Little Endian
Structurearbelprm_performance_monitor_event_st Little Endian
Structurearbelprm_performance_monitors_st Little Endian
Structurearbelprm_performance_monitors_st Little Endian
Structurearbelprm_port_state_change_event_st  
Structurearbelprm_port_state_change_st Little Endian
Structurearbelprm_port_state_change_st Little Endian
Structurearbelprm_qp_db_record_st Little Endian
Structurearbelprm_qp_db_record_st Little Endian
Structurearbelprm_qp_ee_event_st Little Endian
Structurearbelprm_qp_ee_event_st Little Endian
Structurearbelprm_qp_ee_state_transitions_st Little Endian
Structurearbelprm_qp_ee_state_transitions_st Little Endian
Structurearbelprm_qpcbaseaddr_st Little Endian
Structurearbelprm_qpcbaseaddr_st Little Endian
Structurearbelprm_query_adapter_st Little Endian
Structurearbelprm_query_adapter_st Little Endian
Structurearbelprm_query_debug_msg_st Little Endian
Structurearbelprm_query_debug_msg_st Little Endian
Structurearbelprm_query_dev_lim_st Little Endian
Structurearbelprm_query_dev_lim_st Little Endian
Structurearbelprm_query_fw_st Little Endian
Structurearbelprm_query_fw_st Little Endian
Structurearbelprm_queue_pair_ee_context_entry_st Little Endian
Structurearbelprm_queue_pair_ee_context_entry_st Little Endian
Structurearbelprm_rd_send_doorbell_st Little Endian
Structurearbelprm_rd_send_doorbell_st Little Endian
Structurearbelprm_receive_doorbell_st Little Endian
Structurearbelprm_receive_doorbell_st Little Endian
Structurearbelprm_recv_wqe  
Structurearbelprm_recv_wqe_segment_next_st Little Endian
Structurearbelprm_recv_wqe_segment_next_st Little Endian
Structurearbelprm_resize_cq_st Little Endian
Structurearbelprm_resize_cq_st Little Endian
Structurearbelprm_scalar_parameter_st  
Structurearbelprm_scrubbing_event_st Little Endian
Structurearbelprm_scrubbing_event_st Little Endian
Structurearbelprm_send_doorbell_st Little Endian
Structurearbelprm_send_doorbell_st Little Endian
Structurearbelprm_send_wqe_segment_st Little Endian
Structurearbelprm_send_wqe_segment_st Little Endian
Structurearbelprm_set_ib_st Little Endian
Structurearbelprm_set_ib_st Little Endian
Structurearbelprm_srq_context_st Little Endian
Structurearbelprm_srq_context_st Little Endian
Structurearbelprm_tptparams_st Little Endian
Structurearbelprm_tptparams_st Little Endian
Structurearbelprm_transport_and_ci_error_counters_st Little Endian
Structurearbelprm_transport_and_ci_error_counters_st Little Endian
Structurearbelprm_uar_params_st Little Endian
Structurearbelprm_uar_params_st Little Endian
Structurearbelprm_uar_st Little Endian
Structurearbelprm_uar_st Little Endian
Structurearbelprm_ud_address_vector_st Little Endian
Structurearbelprm_ud_address_vector_st Little Endian
Structurearbelprm_ud_send_wqe  
Structurearbelprm_udavtable_memory_parameters_st Little Endian
Structurearbelprm_udavtable_memory_parameters_st Little Endian
Structurearbelprm_virtual_physical_mapping_st Little Endian
Structurearbelprm_virtual_physical_mapping_st Little Endian
Structurearbelprm_vsd_st Little Endian
Structurearbelprm_vsd_st Little Endian
Structurearbelprm_wqe_segment_atomic_st Little Endian
Structurearbelprm_wqe_segment_atomic_st Little Endian
Structurearbelprm_wqe_segment_bind_st Little Endian
Structurearbelprm_wqe_segment_bind_st Little Endian
Structurearbelprm_wqe_segment_ctrl_mlx_st Little Endian
Structurearbelprm_wqe_segment_ctrl_mlx_st Little Endian
Structurearbelprm_wqe_segment_ctrl_recv_st Little Endian
Structurearbelprm_wqe_segment_ctrl_recv_st Little Endian
Structurearbelprm_wqe_segment_ctrl_send_st Little Endian
Structurearbelprm_wqe_segment_ctrl_send_st Little Endian
Structurearbelprm_wqe_segment_data_inline_st Little Endian
Structurearbelprm_wqe_segment_data_inline_st Little Endian
Structurearbelprm_wqe_segment_data_ptr_st Little Endian
Structurearbelprm_wqe_segment_data_ptr_st Little Endian
Structurearbelprm_wqe_segment_next_st Little Endian
Structurearbelprm_wqe_segment_next_st Little Endian
Structurearbelprm_wqe_segment_rd_st Little Endian
Structurearbelprm_wqe_segment_rd_st Little Endian
Structurearbelprm_wqe_segment_remote_address_st Little Endian
Structurearbelprm_wqe_segment_remote_address_st Little Endian
Structurearbelprm_wqe_segment_st Little Endian
Structurearbelprm_wqe_segment_st Little Endian
Structurearbelprm_wqe_segment_ud_st Little Endian
Structurearbelprm_wqe_segment_ud_st Little Endian
ConstantARCNET_TYPE *< ARCNET
ConstantARCNET_TYPE *< ARCNET
Structurearena  
Structurearena  
SourceFilearp.c  
SourceFilearp.h  
ConstantARP_BUF_SZ  
Structurearp_entry  
Staticarp_find_entry Find entry in the ARP cache
Staticarp_find_protocol Identify ARP protocol
Structurearp_net_protocol  
ConstantARP_NET_PROTOCOLS  
Staticarp_ntoa Transcribe ARP address
ConstantARP_OP_REPLY  
ConstantARP_OP_REQUESET  
Structurearp_packet  
Structurearp_packet_st  
ConstantARP_PROT_TYPE  
Functionarp_resolve Look up media-specific link-layer address in the ARP cache
Staticarp_rx Process incoming ARP packets
Constantarp_table_end  
Structurearphdr  
ConstantARPHRD_APPLETLK *< APPLEtalk
ConstantARPHRD_ARCNET *< ARCnet
ConstantARPHRD_ATM *< ATM
ConstantARPHRD_AX25 *< AX.25 Level 2
ConstantARPHRD_CHAOS *< Chaosnet
ConstantARPHRD_DLCI *< Frame Relay DLCI
ConstantARPHRD_EETHER *< Experimental Ethernet
ConstantARPHRD_ETHER *< Ethernet 10Mbps
ConstantARPHRD_EUI64 *< EUI-64
ConstantARPHRD_IEEE1394 *< IEEE 1394 IPv4 - RFC 2734
ConstantARPHRD_IEEE802 *< IEEE 802.2 Ethernet/TR/TB
ConstantARPHRD_INFINIBAND *< InfiniBand
ConstantARPHRD_METRICOM *< Metricom STRIP (new IANA id)
ConstantARPHRD_NETROM *< from KA9Q: NET/ROM pseudo
ConstantARPHRD_PRONET *< PROnet token ring
ConstantARPOP_InREPLY *< InARP reply
ConstantARPOP_InREQUEST *< InARP request
ConstantARPOP_NAK *< (ATM)ARP NAK
ConstantARPOP_REPLY *< ARP reply
ConstantARPOP_REQUEST *< ARP request
ConstantARPOP_RREPLY *< RARP reply
ConstantARPOP_RREQUEST *< RARP request
MacroARRAY_SIZE(a)  
MacroARRAY_SIZE(a)  
MacroARRAY_SIZE(x)  
ConstantARROW_DOWN  
ConstantARROW_LEFT  
ConstantARROW_RIGHT  
ConstantARROW_UP  
ConstantARTAVOR_DEVICE_ID  
ConstantARTAVOR_DEVICE_ID  
ConstantASF_STAT ASF status register
ConstantASIC_PIO  
ConstantASIC_PIO  
ConstantASIC_REV_5700  
ConstantASIC_REV_5701  
ConstantASIC_REV_5703  
ConstantASIC_REV_5704  
ConstantASIC_REV_5705  
ConstantASIC_REV_5750  
ConstantASIC_REV_5787  
EnumASICCtrl_HiWord_bit  
MacroASM_PFX(name)  
MacroASM_PFX(name)  
MacroASM_PFX(name)  
MacroASM_PFX(name)  
SourceFileasn1.c  
SourceFileasn1.h  
ConstantASN1_BIT_STRING  
Structureasn1_cursor  
Functionasn1_enter Enter ASN.1 object
ConstantASN1_EXPLICIT_TAG  
ConstantASN1_INTEGER  
ConstantASN1_IP_ADDRESS  
ConstantASN1_NULL  
ConstantASN1_OCTET_STRING  
ConstantASN1_OID  
ConstantASN1_SEQUENCE  
Functionasn1_skip Skip ASN.1 object
Staticasn1_start @file
Functionasprintf Write a formatted string to newly allocated memory.
SourceFileasprintf.c  
Macroassert( condition )  
MacroASSERT(x)  
MacroASSERT(x)  
SourceFileassert.h  
Staticassert_match  
Staticassert_match  
Macroassert_match(a,b,c)  
Macroassert_match(a,b,c)  
ConstantASSERTING  
ConstantASSERTING  
ConstantASSOC_RETRIES  
ConstantASSOC_TIMEOUT  
SourceFileata.c  
SourceFileata.h  
Structureata_cb  
ConstantATA_CMD_IDENTIFY  
ConstantATA_CMD_READ  
ConstantATA_CMD_READ_EXT  
ConstantATA_CMD_WRITE  
ConstantATA_CMD_WRITE_EXT  
Structureata_command  
ConstantATA_DEV_LBA  
ConstantATA_DEV_MASK  
ConstantATA_DEV_MASTER  
ConstantATA_DEV_OBSOLETE  
ConstantATA_DEV_SLAVE  
Structureata_device  
Unionata_fifo  
Staticata_identify Identify ATA device
Structureata_identity  
Unionata_lba  
Staticata_read Read block from ATA device
ConstantATA_SECTOR_SIZE  
ConstantATA_SUPPORTS_LBA48  
Staticata_write Write block to ATA device
StructureATAPI_DEVICE_PATH  
ConstantATC_COLOR_PAGE  
ConstantATC_COLOR_PAGE  
ConstantATC_MODE  
ConstantATC_MODE  
ConstantATC_OVERSCAN  
ConstantATC_OVERSCAN  
ConstantATC_PEL  
ConstantATC_PEL  
ConstantATC_PLANE_ENABLE  
ConstantATC_PLANE_ENABLE  
ConstantATH_CHAN_MAX  
ConstantATH_CHAN_MAX  
ConstantATH_RXBUF number of RX buffers
ConstantATH_TXBUF number of TX buffers
SourceFileath5k.c  
SourceFileath5k.h  
Enumath5k_ant_setting  
Structureath5k_athchan_2ghz  
Staticath5k_attach *********************\
SourceFileath5k_attach.c  
Functionath5k_bitrate_to_hw_rix  
Structureath5k_buf  
Staticath5k_cal_data_offset_2413 and each section's size.
ConstantATH5K_CALIB_INTERVAL Calibrate PHY every 10 seconds
Staticath5k_calibrate  
Structureath5k_capabilities  
Enumath5k_capability_type  
SourceFileath5k_caps.c  
Structureath5k_chan_pcal_info  
Structureath5k_chan_pcal_info_rf2413  
Structureath5k_chan_pcal_info_rf5111  
Structureath5k_chan_pcal_info_rf5112  
Staticath5k_chan_set  
Functionath5k_channel_ok ************************\
Staticath5k_chip_name ******************\
Staticath5k_combine_linear_pcdac_curves  
Staticath5k_combine_pwr_to_pdadc_curves  
Staticath5k_config  
Staticath5k_configure_filter  
Staticath5k_copy_channels  
Staticath5k_create_power_curve  
Enumath5k_ctl_mode  
Structureath5k_desc  
SourceFileath5k_desc.c  
ConstantATH5K_DESC_ALIGN Alignment for TX/RX descriptors
Staticath5k_desc_alloc *****************\
Staticath5k_desc_free  
Staticath5k_detach  
SourceFileath5k_dma.c  
Enumath5k_dmasize  
Enumath5k_driver_mode  
Structureath5k_edge_power  
SourceFileath5k_eeprom.c  
Staticath5k_eeprom_bin2freq  
Staticath5k_eeprom_convert_pcal_info_2413 used by interpolation code
Staticath5k_eeprom_convert_pcal_info_5111 used by interpolation code
Staticath5k_eeprom_convert_pcal_info_5112 used by interpolation code
Functionath5k_eeprom_detach  
Staticath5k_eeprom_free_pcal_info  
Structureath5k_eeprom_info  
Functionath5k_eeprom_init  
Staticath5k_eeprom_init_11a_pcal_freq  
Inlineath5k_eeprom_init_11bg_2413  
Staticath5k_eeprom_init_header  
Staticath5k_eeprom_init_modes  
Functionath5k_eeprom_is_hb63  
Staticath5k_eeprom_read_ants  
Staticath5k_eeprom_read_ctl_info  
Inlineath5k_eeprom_read_freq_list frequency mask)
Functionath5k_eeprom_read_mac  
Staticath5k_eeprom_read_modes  
Staticath5k_eeprom_read_pcal_info  
Staticath5k_eeprom_read_pcal_info_2413  
Staticath5k_eeprom_read_pcal_info_5111  
Staticath5k_eeprom_read_pcal_info_5112  
Staticath5k_eeprom_read_target_rate_pwr_info  
Staticath5k_eeprom_read_turbo_modes  
Staticath5k_fill_pwr_to_pcdac_table  
Structureath5k_gain  
Structureath5k_gain_opt  
Structureath5k_gain_opt_step  
Staticath5k_get_chan_pcal_surrounding_piers  
Staticath5k_get_interpolated_value **************\
Staticath5k_get_linear_pcdac_min  
Staticath5k_get_max_ctl_power  
Inlineath5k_get_pcdac_intercepts  
Staticath5k_get_rate_pcal_data  
SourceFileath5k_gpio.c  
Staticath5k_handle_rx  
Staticath5k_handle_tx  
Structureath5k_hw  
Structureath5k_hw_2w_tx_ctl  
Structureath5k_hw_4w_tx_ctl  
Structureath5k_hw_5210_tx_desc  
Structureath5k_hw_5212_tx_desc  
Structureath5k_hw_all_rx_desc  
Functionath5k_hw_attach ath5k_hw_attach - Check if hw is supported and init the needed structs
Staticath5k_hw_chan_has_spur_noise  
Functionath5k_hw_channel  
Staticath5k_hw_commit_eeprom_settings  
Functionath5k_hw_detach ath5k_hw_detach - Free the ath5k_hw struct
Staticath5k_hw_eeprom_read  
Functionath5k_hw_gainf_calibrate adjustment
Functionath5k_hw_get_ack_timeout ****************\
Functionath5k_hw_get_capability  
Functionath5k_hw_get_cts_timeout ath5k_hw_get_cts_timeout - Get CTS timeout from PCU in usec
Functionath5k_hw_get_def_antenna  
Functionath5k_hw_get_gpio  
Functionath5k_hw_get_isr ath5k_hw_get_isr - Get interrupt status
Functionath5k_hw_get_lladdr **************\
Functionath5k_hw_get_rx_filter ath5k_hw_get_rx_filter - Get current rx filter
Functionath5k_hw_get_rxdp ath5k_hw_get_rxdp - Get RX Descriptor's address
Functionath5k_hw_get_txdp ath5k_hw_get_txdp - Get TX Descriptor's address for a specific queue
Macroath5k_hw_hasbssidmask(_ah)  
Macroath5k_hw_hasveol(_ah)  
Staticath5k_hw_ini_mode_registers  
Functionath5k_hw_init_desc_functions  
Functionath5k_hw_is_intr_pending *****************\
Staticath5k_hw_nic_reset  
Functionath5k_hw_nic_wakeup  
Functionath5k_hw_noise_floor_calibration ***************\
Functionath5k_hw_phy_calibrate  
Functionath5k_hw_phy_disable  
Staticath5k_hw_post ath5k_hw_post - Power On Self Test helper function
Staticath5k_hw_proc_2word_tx_status  
Staticath5k_hw_proc_4word_tx_status  
Staticath5k_hw_proc_5210_rx_status  
Staticath5k_hw_proc_5212_rx_status  
Functionath5k_hw_radio_revision ******************\
Functionath5k_hw_release_tx_queue  
Staticath5k_hw_request_rfgain_probe  
Functionath5k_hw_reset  
Functionath5k_hw_reset_key *******************\
Functionath5k_hw_reset_tx_queue  
Staticath5k_hw_rf_check_gainf_readback their detection window) so we must ignore it
Staticath5k_hw_rf_gainf_adjust of parameters from rf gain optimization ladder
Staticath5k_hw_rf_gainf_corr based on the current step for RF5112 rev. 2
Staticath5k_hw_rf2425_channel  
Staticath5k_hw_rf5110_calibrate  
Staticath5k_hw_rf5110_chan2athchan  
Staticath5k_hw_rf5110_channel  
Staticath5k_hw_rf5111_chan2athchan  
Staticath5k_hw_rf5111_channel  
Staticath5k_hw_rf5112_channel  
Staticath5k_hw_rf511x_calibrate  
Staticath5k_hw_rfb_op  
Functionath5k_hw_rfgain_init with gain_F calibration
Functionath5k_hw_rfgain_opt_init ********************\
Functionath5k_hw_rfregs_init ******************\
Inlineath5k_hw_rix_to_bitrate  
Structureath5k_hw_rx_ctl  
Structureath5k_hw_rx_error  
Structureath5k_hw_rx_status  
Functionath5k_hw_set_ack_bitrate_high ath5k_hw_set_ack_bitrate - set bitrate for ACKs
Functionath5k_hw_set_ack_timeout ath5k_hw_set_ack_timeout - Set ACK timeout on PCU
Functionath5k_hw_set_associd ath5k_hw_set_associd - Set BSSID for association
Functionath5k_hw_set_bssid_mask ath5k_hw_set_bssid_mask - filter out bssids we listen
Functionath5k_hw_set_capabilities  
Functionath5k_hw_set_cts_timeout ath5k_hw_set_cts_timeout - Set CTS timeout on PCU
Functionath5k_hw_set_def_antenna  
Functionath5k_hw_set_gpio  
Functionath5k_hw_set_gpio_input  
Functionath5k_hw_set_gpio_intr  
Functionath5k_hw_set_gpio_output  
Functionath5k_hw_set_imr ath5k_hw_set_imr - Set interrupt mask
Functionath5k_hw_set_lladdr ath5k_hw_set_lladdr - Set station id
Functionath5k_hw_set_mcast_filter  
Functionath5k_hw_set_opmode *****************\
Functionath5k_hw_set_rx_filter ath5k_hw_set_rx_filter - Set rx filter
Functionath5k_hw_set_rxdp ath5k_hw_set_rxdp - Set RX Descriptor's address
Functionath5k_hw_set_slot_time  
Functionath5k_hw_set_tx_queueprops  
Functionath5k_hw_set_txdp ath5k_hw_set_txdp - Set TX Descriptor's address for a specific queue
Functionath5k_hw_set_txpower_limit  
Staticath5k_hw_setup_2word_tx_desc  
Staticath5k_hw_setup_4word_tx_desc  
Staticath5k_hw_setup_rx_desc  
Functionath5k_hw_setup_tx_queue  
Functionath5k_hw_start_rx_dma *******\
Functionath5k_hw_start_rx_pcu **********\
Functionath5k_hw_start_tx_dma ********\
Functionath5k_hw_stop_rx_dma ath5k_hw_stop_rx_dma - Stop DMA receive
Functionath5k_hw_stop_rx_pcu at5k_hw_stop_rx_pcu - Stop RX engine
Functionath5k_hw_stop_tx_dma ath5k_hw_stop_tx_dma - Stop DMA transmit on a specific queue
Staticath5k_hw_tweak_initval_settings  
Structureath5k_hw_tx_status  
Functionath5k_hw_txpower  
Functionath5k_hw_update_tx_triglevel ath5k_hw_update_tx_triglevel - Update tx trigger level
Functionath5k_hw_wake  
Functionath5k_hw_write_initvals  
Staticath5k_hw_write_ofdm_timings ath5k_hw_write_ofdm_timings - set OFDM timings on AR5212
Inlineath5k_hw_write_rate_duration ath5k_hw_write_rate_duration - fill rate code to duration table
Inlineath5k_ieee2mhz ******************\
Classath5k_ini  
Structureath5k_ini_mode  
Structureath5k_ini_rfbuffer  
Structureath5k_ini_rfgain  
Staticath5k_init  
SourceFileath5k_initvals.c  
Enumath5k_int  
Staticath5k_irq ******************\
Staticath5k_mode_setup  
ConstantATH5K_NR_RATES  
SourceFileath5k_pcu.c  
Structureath5k_pdgain_info  
Inlineath5k_pdgains_size_2413 these two functions
SourceFileath5k_phy.c  
Enumath5k_pkt_type  
Staticath5k_poll  
Enumath5k_power_mode  
Enumath5k_powertable_type  
Staticath5k_probe  
SourceFileath5k_qcu.c  
Enumath5k_radio  
ConstantATH5K_RATE_CODE_11M  
ConstantATH5K_RATE_CODE_12M  
ConstantATH5K_RATE_CODE_18M  
ConstantATH5K_RATE_CODE_1M  
ConstantATH5K_RATE_CODE_24M  
ConstantATH5K_RATE_CODE_2M  
ConstantATH5K_RATE_CODE_36M  
ConstantATH5K_RATE_CODE_48M  
ConstantATH5K_RATE_CODE_5_5M  
ConstantATH5K_RATE_CODE_54M  
ConstantATH5K_RATE_CODE_6M  
ConstantATH5K_RATE_CODE_9M  
ConstantATH5K_RATE_CODE_XR_1M  
ConstantATH5K_RATE_CODE_XR_2M  
ConstantATH5K_RATE_CODE_XR_3M  
ConstantATH5K_RATE_CODE_XR_500K  
Structureath5k_rate_pcal_info  
Structureath5k_rates[]  
Staticath5k_remove  
Staticath5k_reset  
SourceFileath5k_reset.c  
Staticath5k_reset_wake  
ConstantATH5K_RETRIES Number of times to retry packet sends
Structureath5k_rf_reg  
Enumath5k_rf_regs_idx  
Structureath5k_rfb_field  
Enumath5k_rfgain  
Staticath5k_rx_iob_alloc *************\
Staticath5k_rx_start ***********\
Structureath5k_rx_status  
Staticath5k_rx_stop  
Inlineath5k_rxbuf_free  
Staticath5k_rxbuf_setup  
Staticath5k_setcurmode  
Staticath5k_setup_bands  
Staticath5k_setup_channel_powertable  
Staticath5k_setup_pcdac_table  
Staticath5k_setup_pwr_to_pdadc_table  
Staticath5k_setup_rate_powertable  
Structureath5k_softc  
ConstantATH5K_SPMBL_BOTH  
ConstantATH5K_SPMBL_NO  
ConstantATH5K_SPMBL_YES  
Structureath5k_srev_name  
Enumath5k_srev_type  
Staticath5k_start  
Staticath5k_stop  
Staticath5k_stop_hw  
Staticath5k_tx ******************\
Staticath5k_tx_processq ***********\
Enumath5k_tx_queue  
Enumath5k_tx_queue_id  
Enumath5k_tx_queue_subtype  
Structureath5k_tx_status  
Inlineath5k_txbuf_free  
Staticath5k_txbuf_setup  
Structureath5k_txq  
Staticath5k_txq_cleanup  
Staticath5k_txq_drainq  
Structureath5k_txq_info  
Staticath5k_txq_release  
Staticath5k_txq_setup ************\
Enumath5k_version  
ConstantATMEL_CHIP_ERASE  
ConstantATMEL_RDID  
ConstantATMEL_SECTOR_ERASE  
ConstantATT_C 21 Attribute Controller Registers
ConstantATT_C 21 Attribute Controller Registers
ConstantATT_IW Attribute Controller Index & Data Write Register
ConstantATT_IW Attribute Controller Index & Data Write Register
ConstantATT_R Attribute Controller Data Read Register
ConstantATT_R Attribute Controller Data Read Register
ConstantATTR_BCOL_BLACK  
ConstantATTR_BCOL_BLACK  
ConstantATTR_BCOL_BLACK  
ConstantATTR_BCOL_BLUE  
ConstantATTR_BCOL_BLUE  
ConstantATTR_BCOL_BLUE  
ConstantATTR_BCOL_CYAN  
ConstantATTR_BCOL_CYAN  
ConstantATTR_BCOL_CYAN  
ConstantATTR_BCOL_GREEN  
ConstantATTR_BCOL_GREEN  
ConstantATTR_BCOL_GREEN  
ConstantATTR_BCOL_MAGENTA  
ConstantATTR_BCOL_MAGENTA  
ConstantATTR_BCOL_MAGENTA  
ConstantATTR_BCOL_MASK  
ConstantATTR_BCOL_MASK  
ConstantATTR_BCOL_MASK  
ConstantATTR_BCOL_RED  
ConstantATTR_BCOL_RED  
ConstantATTR_BCOL_RED  
ConstantATTR_BCOL_WHITE  
ConstantATTR_BCOL_WHITE  
ConstantATTR_BCOL_WHITE  
ConstantATTR_BCOL_YELLOW  
ConstantATTR_BCOL_YELLOW  
ConstantATTR_BCOL_YELLOW  
ConstantATTR_BOLD  
ConstantATTR_BOLD  
ConstantATTR_BOLD  
ConstantATTR_DEFAULT  
ConstantATTR_DEFAULT  
ConstantATTR_DEFAULT  
ConstantATTR_FCOL_BLACK  
ConstantATTR_FCOL_BLACK  
ConstantATTR_FCOL_BLACK  
ConstantATTR_FCOL_BLUE  
ConstantATTR_FCOL_BLUE  
ConstantATTR_FCOL_BLUE  
ConstantATTR_FCOL_CYAN  
ConstantATTR_FCOL_CYAN  
ConstantATTR_FCOL_CYAN  
ConstantATTR_FCOL_GREEN  
ConstantATTR_FCOL_GREEN  
ConstantATTR_FCOL_GREEN  
ConstantATTR_FCOL_MAGENTA  
ConstantATTR_FCOL_MAGENTA  
ConstantATTR_FCOL_MAGENTA  
ConstantATTR_FCOL_MASK  
ConstantATTR_FCOL_MASK  
ConstantATTR_FCOL_MASK  
ConstantATTR_FCOL_RED  
ConstantATTR_FCOL_RED  
ConstantATTR_FCOL_RED  
ConstantATTR_FCOL_WHITE  
ConstantATTR_FCOL_WHITE  
ConstantATTR_FCOL_WHITE  
ConstantATTR_FCOL_YELLOW  
ConstantATTR_FCOL_YELLOW  
ConstantATTR_FCOL_YELLOW  
ConstantATTRS_SHIFT  
ConstantAUI  
ConstantAUI_LOOPBACK  
ConstantAUI_ON  
ConstantAUI_ONLY  
ConstantAUTO_ALL_MODES  
ConstantAUTO_AUI_10BASET  
ConstantAUTO_ENABLE  
ConstantAUTO_NEG_BITS  
ConstantAUTO_NEG_BUSY  
ConstantAUTO_NEG_CNF_OFFSET 8920 eeprom
ConstantAUTO_NEG_ENABLE  
ConstantAUTO_NEG_MASK  
ConstantAUTO_POLARITY_DISABLE register 11h bit 4
ConstantAUTO_READ_DONE_TIMEOUT  
ConstantAUTO_RX_DMA  
ConstantAUTO_WAKEUP  
Functionautoboot Boot the system
SourceFileautoboot.c  
SourceFileautoboot.h  
SourceFileautoboot_cmd.c  
Staticautoboot_exec  
Structureautocolour  
ConstantAUTOINCREMENT Bit mask to set bit-15 for autoincrement
ConstantAUTOMEDIA  
ConstantAUTONEG_ADVERTISE_10_100_ALL All 10/100 speeds
ConstantAUTONEG_ADVERTISE_10_ALL 10Mbps Full & Half speeds
ConstantAUTONEG_ADVERTISE_SPEED_DEFAULT Everything but 1000-Half
ConstantAUTONEG_DISABLE  
ConstantAUTONEG_DISABLE  
ConstantAUTONEG_DISABLE  
ConstantAUTONEG_DISABLE  
ConstantAUTONEG_DISABLE  
ConstantAUTONEG_DISABLE  
ConstantAUTONEG_ENABLE  
ConstantAUTONEG_ENABLE  
ConstantAUTONEG_ENABLE  
ConstantAUTONEG_ENABLE  
ConstantAUTONEG_ENABLE  
ConstantAUTONEG_ENABLE  
ConstantAUTOPOLL0 Auto-poll0 register
EnumAUTOPOLL0_BITS  
ConstantAUTOPOLL1 Auto-poll1 register
EnumAUTOPOLL1_BITS  
ConstantAUTOPOLL2 Auto-poll2 register
EnumAUTOPOLL2_BITS  
ConstantAUTOPOLL3 Auto-poll3 register
EnumAUTOPOLL3_BITS  
ConstantAUTOPOLL4 Auto-poll4 register
EnumAUTOPOLL4_BITS  
ConstantAUTOPOLL5 Auto-poll5 register
EnumAUTOPOLL5_BITS  
Structureautosized_block  
Staticautovivify_child_settings Find or create child named settings block
ConstantAUXCR_MDPPS  
Staticawait_fsp  
Staticawait_rpc AWAIT_RPC - Wait for an rpc packet
ConstantAX25_TYPE *< Amateur Radio AX.25
ConstantAX25_TYPE *< Amateur Radio AX.25
SourceFileaxtls_aes.c  
SourceFileaxtls_sha1.c  

BB

B A B C D E F G H I J K L M N O P Q R S T U V W X Y Z  [Top]
ConstantB_OWNED_BY_CHIP  
ConstantB_OWNED_BY_HOST  
SourceFileb44.c  
SourceFileb44.h  
ConstantB44_30BIT_DMA_MASK  
ConstantB44_ADDR_HI ENET Address Hi (B0 only)
ConstantB44_ADDR_LO ENET Address Lo (B0 only)
ConstantB44_BIST_STAT Built-In Self-Test Status
ConstantB44_CAM_CTRL EMAC CAM Control
ConstantB44_CAM_DATA_HI EMAC CAM Data High
ConstantB44_CAM_DATA_LO EMAC CAM Data Low
Staticb44_cam_write  
Staticb44_chip_reset  
ConstantB44_CHIP_RESET_FULL  
ConstantB44_CHIP_RESET_PARTIAL  
Staticb44_close Close network device
ConstantB44_DEVCTRL Device Control
ConstantB44_DMA_ALIGNMENT  
ConstantB44_DMAFIFO_AD DMA FIFO Diag Address
ConstantB44_DMAFIFO_HI DMA FIFO Diag High Data
ConstantB44_DMAFIFO_LO DMA FIFO Diag Low Data
ConstantB44_DMARX_ADDR DMA RX Descriptor Ring Addr
ConstantB44_DMARX_CTRL DMA RX Control
ConstantB44_DMARX_PTR DMA RX Last Posted Desc
ConstantB44_DMARX_STAT Cur Active Desc. + Status
ConstantB44_DMATX_ADDR DMA TX Descriptor Ring Addr
ConstantB44_DMATX_CTRL DMA TX Control
ConstantB44_DMATX_PTR DMA TX Last Posted Desc.
ConstantB44_DMATX_STAT DMA TX Cur Actve Desc. + Sts
ConstantB44_EMAC_IMASK EMAC Interrupt Mask
ConstantB44_EMAC_ISTAT EMAC Interrupt Status
ConstantB44_ENET_CTRL EMAC ENET Control
ConstantB44_FILT_ADDR ENET Filter Address
ConstantB44_FILT_DATA ENET Filter Data
Staticb44_free_rx_ring  
Staticb44_free_tx_ring  
ConstantB44_FULL_RESET  
ConstantB44_FULL_RESET_SKIP_PHY  
ConstantB44_GPTIMER General Purpose Timer
Staticb44_halt called by b44_poll in the error path
ConstantB44_IMASK Interrupt Mask
Staticb44_init_hw  
Staticb44_init_rx_ring  
Staticb44_init_tx_ring  
Staticb44_irq Enable or disable interrupts
ConstantB44_ISTAT Interrupt Status
Staticb44_load_mac_and_phy_addr  
ConstantB44_MAC_CTRL MAC Control
ConstantB44_MAC_FLOW MAC Flow Control
ConstantB44_MAX_MTU  
ConstantB44_MDIO_CTRL EMAC MDIO Control
ConstantB44_MDIO_DATA EMAC MDIO Data
ConstantB44_MIB_CTRL EMAC MIB Control
ConstantB44_MII_ALEDCTRL Activity LED
ConstantB44_MII_AUXCTRL Auxiliary Control
ConstantB44_MII_TLEDCTRL Traffic Meter LED
ConstantB44_MIN_MTU  
Staticb44_open Open network device
ConstantB44_PARTIAL_RESET  
Staticb44_phy_read * Interaction with the PHY **
Staticb44_phy_reset  
Staticb44_phy_write  
Staticb44_poll Poll for completed and received packets
Staticb44_populate_rx_descriptor * Management of ring descriptors **
Structureb44_private  
Staticb44_probe * Implementation of gPXE driver callbacks **
Staticb44_process_rx_packets  
ConstantB44_RCV_LAZY Lazy Interrupt Control
Staticb44_read_eeprom  
ConstantB44_REGS_SIZE  
Staticb44_remove Remove device
ConstantB44_RING_LAST  
ConstantB44_RING_SIZE  
ConstantB44_RX_1024_MAX MIB RX 1024 to max byte Pkts
ConstantB44_RX_128_255 MIB RX 128 to 255 byte Pkts
ConstantB44_RX_256_511 MIB RX 256 to 511 byte Pkts
ConstantB44_RX_512_1023 MIB RX 512 to 1023 byte Pkts
ConstantB44_RX_64 MIB RX <= 64 byte Packets
ConstantB44_RX_65_127 MIB RX 65 to 127 byte Pkts
ConstantB44_RX_ALIGN MIB RX Align Errors
ConstantB44_RX_BCAST MIB RX Broadcast Packets
ConstantB44_RX_CRC MIB RX CRC Errors
ConstantB44_RX_CRCA MIB RX CRC Align Errors
ConstantB44_RX_FRAG MIB RX Fragment Packets
ConstantB44_RX_GOOD_O MIB RX Good Octets
ConstantB44_RX_GOOD_P MIB RX Good Packets
ConstantB44_RX_JABBER MIB RX Jabber Packets
ConstantB44_RX_MCAST MIB RX Multicast Packets
ConstantB44_RX_MISS MIB RX Missed Packets
ConstantB44_RX_NPAUSE MIB RX Non-Pause Packets
ConstantB44_RX_O MIB RX Octets
ConstantB44_RX_OSIZE MIB RX Oversize Packets
ConstantB44_RX_P MIB RX Packets
ConstantB44_RX_PAUSE MIB RX Pause Packets
Staticb44_rx_refill  
ConstantB44_RX_RING_LEN_BYTES  
ConstantB44_RX_SYM MIB RX Symbol Errors
ConstantB44_RX_USIZE MIB RX Undersize Packets
ConstantB44_RXBURST RX Max Burst Length
ConstantB44_RXCONFIG EMAC RX Config
ConstantB44_RXMAXLEN EMAC RX Max Packet Length
ConstantB44_SBIDHIGH SB Identification High
ConstantB44_SBIMSTATE SB Initiator Agent State
ConstantB44_SBINTVEC SB Interrupt Mask
ConstantB44_SBTMSHIGH SB Target State High
ConstantB44_SBTMSLOW SB Target State Low
Staticb44_set_mac_addr  
Staticb44_set_rx_mode  
Staticb44_transmit Transmit packet
ConstantB44_TX_1024_MAX MIB TX 1024 to max byte Pkts
ConstantB44_TX_128_255 MIB TX 128 to 255 byte Pkts
ConstantB44_TX_256_511 MIB TX 256 to 511 byte Pkts
ConstantB44_TX_512_1023 MIB TX 512 to 1023 byte Pkts
ConstantB44_TX_64 MIB TX <= 64 byte Packets
ConstantB44_TX_65_127 MIB TX 65 to 127 byte Pkts
ConstantB44_TX_BCAST MIB TX Broadcast Packets
ConstantB44_TX_CLOST MIB TX Carrier Lost
Staticb44_tx_complete Recycles sent TX descriptors and notifies network stack
ConstantB44_TX_CTRL EMAC TX Control
ConstantB44_TX_DEFERED MIB TX Defered Packets
ConstantB44_TX_ECOLS MIB TX Excessive Collisions
ConstantB44_TX_FRAG MIB TX Fragment Packets
ConstantB44_TX_GOOD_O MIB TX Good Octets
ConstantB44_TX_GOOD_P MIB TX Good Packets
ConstantB44_TX_HIWMARK EMAC TX High Watermark
ConstantB44_TX_JABBER MIB TX Jabber Packets
ConstantB44_TX_LCOLS MIB TX Late Collisions
ConstantB44_TX_MCAST MIB TX Multicast Packets
ConstantB44_TX_MCOLS MIB TX Multiple Collisions
ConstantB44_TX_O MIB TX Octets
ConstantB44_TX_OSIZE MIB TX Oversize Packets
ConstantB44_TX_P MIB TX Packets
ConstantB44_TX_PAUSE MIB TX Pause Packets
ConstantB44_TX_RING_LEN_BYTES  
ConstantB44_TX_SCOLS MIB TX Single Collisions
ConstantB44_TX_TCOLS MIB TX Total Collisions
ConstantB44_TX_URUNS MIB TX Underruns
ConstantB44_TXBURST TX Max Burst Length
ConstantB44_TXMAXLEN EMAC TX Max Packet Length
Staticb44_wait_bit Wait until the given bit is set/cleared.
ConstantB44_WKUP_LEN Wakeup Length
ConstantBABL Babble transmitter timeout error
ConstantBACKOFF_OFF  
Staticbackspace Delete character to left of current cursor position
ConstantBACKSPACE  
ConstantBANK_SELECT  
ConstantBANK0_SELECT  
ConstantBANK1_SELECT  
ConstantBANK2_SELECT  
ConstantBANNER_TIMEOUT Tenths of a second for which the shell
ConstantBAP_TIMEOUT  
ConstantBAR_0  
ConstantBAR_0  
ConstantBAR_1  
ConstantBAR_1  
ConstantBAR_5  
ConstantBAR_5  
Macrobarrier()  
ConstantBASE  
ConstantBASE  
SourceFilebase.h  
SourceFileBase.h  
SourceFilebase64.c  
SourceFilebase64.h  
Functionbase64_encode Base64-encode a string
SourceFilebasemem.c  
SourceFilebasemem.c  
SourceFilebasemem.h  
SourceFilebasemem.h  
Constantbasemem_packet  
Constantbasemem_packet  
SourceFilebasemem_packet.c  
SourceFilebasemem_packet.c  
SourceFilebasemem_packet.h  
SourceFilebasemem_packet.h  
ConstantBASEMEM_PACKET_LEN  
ConstantBASEMEM_PACKET_LEN  
Functionbasename Return base name from path
SourceFilebasename.c  
ConstantBASEPORT  
ConstantBASEPORT  
ConstantBB_ANTATTEN_CHAN14  
ConstantBB_ANTENNA_B  
ConstantBB_HOST_BANG  
ConstantBB_HOST_BANG_CLK  
ConstantBB_HOST_BANG_DATA  
ConstantBB_HOST_BANG_EN  
StaticbbConfig  
StaticbbConfig  
StaticbbFlushBits  
StaticbbFlushBits  
StaticbbPutBit  
StaticbbPutBit  
StaticbbPutByte  
StaticbbPutByte  
StructureBBS_BBS_DEVICE_PATH  
ConstantBBS_BBS_DP  
ConstantBBS_DEVICE_PATH  
ConstantBBS_TYPE_BEV  
ConstantBBS_TYPE_CDROM  
ConstantBBS_TYPE_EMBEDDED_NETWORK  
ConstantBBS_TYPE_FLOPPY  
ConstantBBS_TYPE_HARDDRIVE  
ConstantBBS_TYPE_PCMCIA  
ConstantBBS_TYPE_UNKNOWN  
ConstantBBS_TYPE_USB  
StaticbbWriteBits  
StaticbbWriteBits  
ConstantBCAST_QPN  
ConstantBCD_COUNT  
ConstantBCD_COUNT  
ConstantBCM_PAGE_BITS  
ConstantBCM_PAGE_SIZE  
ConstantBCM4400_PCI_CORE_ADDR  
ConstantBCM5708S_1000X_CTL1  
ConstantBCM5708S_1000X_CTL1_AUTODET_EN  
ConstantBCM5708S_1000X_CTL1_FIBER_MODE  
ConstantBCM5708S_1000X_CTL2  
ConstantBCM5708S_1000X_CTL2_PLLEL_DET_E  
ConstantBCM5708S_1000X_STAT1  
ConstantBCM5708S_1000X_STAT1_FD  
ConstantBCM5708S_1000X_STAT1_LINK  
ConstantBCM5708S_1000X_STAT1_RX_PAUSE  
ConstantBCM5708S_1000X_STAT1_SGMII  
ConstantBCM5708S_1000X_STAT1_SPEED_10  
ConstantBCM5708S_1000X_STAT1_SPEED_100  
ConstantBCM5708S_1000X_STAT1_SPEED_1G  
ConstantBCM5708S_1000X_STAT1_SPEED_2G5  
ConstantBCM5708S_1000X_STAT1_SPEED_MASK  
ConstantBCM5708S_1000X_STAT1_TX_PAUSE  
ConstantBCM5708S_BLK_ADDR  
ConstantBCM5708S_BLK_ADDR_DIG  
ConstantBCM5708S_BLK_ADDR_DIG3  
ConstantBCM5708S_BLK_ADDR_TX_MISC  
ConstantBCM5708S_DIG_3_0  
ConstantBCM5708S_DIG_3_0_USE_IEEE  
ConstantBCM5708S_TX_ACTL1  
ConstantBCM5708S_TX_ACTL1_DRIVER_VCM  
ConstantBCM5708S_TX_ACTL3  
ConstantBCM5708S_UP1  
ConstantBCM5708S_UP1_2G5  
ConstantBCON Byte CONtrol
Functionbcopy bcopy - Copy one area of memory to another
ConstantBCR0_CRFT0  
ConstantBCR0_CRFT1  
ConstantBCR0_CRFT2  
ConstantBCR0_DMAL0  
ConstantBCR0_DMAL1  
ConstantBCR0_DMAL2  
ConstantBCR1_CTFT0  
ConstantBCR1_CTFT1  
ConstantBCR1_CTSF  
ConstantBCR1_POT0  
ConstantBCR1_POT1  
ConstantBCR1_POT2  
ConstantBDA_FBMS  
ConstantBDA_FBMS  
ConstantBDA_NUM_DRIVES  
ConstantBDA_NUM_DRIVES  
ConstantBDA_SEG  
ConstantBDA_SEG  
ConstantBDINFO_FLAGS_DISABLED  
ConstantBDINFO_FLAGS_MAXLEN_MASK  
ConstantBDINFO_FLAGS_MAXLEN_SHIFT  
ConstantBDINFO_FLAGS_USE_EXT_RECV ext rx_buffer_desc
Macrobe16_to_cpu(x)  
Macrobe16_to_cpu(x)  
Macrobe16_to_cpus(x)  
Macrobe16_to_cpus(x)  
Macrobe32_to_cpu(x)  
Macrobe32_to_cpu(x)  
Macrobe32_to_cpus(x)  
Macrobe32_to_cpus(x)  
Macrobe64_to_cpu(x)  
Macrobe64_to_cpu(x)  
Macrobe64_to_cpus(x)  
Macrobe64_to_cpus(x)  
Functionbeep @file
Structurebf  
Structurebf  
ConstantBF_ALLOC alloc'd but not yet filled
ConstantBF_ALLOC alloc'd but not yet filled
ConstantBF_FREE free
ConstantBF_FREE free
Inlinebflush  
Functionbi_add @brief Perform an addition operation between two bigints.
Functionbi_barrett @brief Perform a single Barrett reduction.
Functionbi_clone @brief Do a full copy of the bigint object.
Functionbi_compare @brief Compare two bigints.
Functionbi_copy @brief Increment the number of references to this object.
Staticbi_crt Use the Chinese Remainder Theorem to quickly perform RSA decrypts.
StructureBI_CTX *< A big integer "session" context.
Functionbi_depermanent @brief Take a permanent object and make it eligible for freedom.
Functionbi_divide @brief Does both division and modulo calculations.
Functionbi_export @brief Take a bigint and convert it into a byte sequence.
Functionbi_free @brief Free a bigint object so it can be used again.
Functionbi_free_mod @brief Used when cleaning various bigints at the end of a session.
Functionbi_import @brief Allow a binary sequence to be imported as a bigint.
Functionbi_initialize @brief Start a new bigint context.
Staticbi_int_divide  
Staticbi_int_multiply Perform a multiply between a bigint an an (unsigned) integer
Macrobi_mod(A, B)  
Functionbi_mod_power @brief Perform a modular exponentiation.
Functionbi_mod_power2 @brief Perform a modular exponentiation using a temporary modulus.
Functionbi_mont @brief Perform a single montgomery reduction.
Functionbi_multiply @brief Perform a multiplication operation between two bigints.
Functionbi_permanent @brief Simply make a bigint object "unfreeable" if bi_free() is called on it.
Functionbi_print  
Macrobi_residue(A, B)  
Macrobi_residue(A, B)  
Macrobi_residue(A, B)  
Functionbi_set_mod @brief Pre-calculate some of the expensive steps in reduction.
Functionbi_square @brief Perform a square operation on a bigint.
Macrobi_square(A, B)  
Functionbi_str_import @brief The testharness uses this code to import text hex-streams and
Functionbi_subtract @brief Perform a subtraction operation between two bigints.
Functionbi_terminate @brief Close the bigint context and free any resources.
SourceFilebig_bswap.h  
SourceFilebigint.c  
SourceFilebigint.h  
SourceFilebigint_impl.h  
ConstantBIGINT_M_OFFSET *< Normal modulo offset.
ConstantBIGINT_NUM_MODS *< The number of modulus constants used.
ConstantBIGINT_NUM_MODS  
ConstantBIGINT_P_OFFSET *< p modulo offset.
ConstantBIGINT_Q_OFFSET *< q module offset.
SourceFilebin2intelhex.c  
SourceFilebin2intelhex.c  
ConstantBINARY_COUNT  
ConstantBINARY_COUNT  
SourceFilebios.h  
SourceFilebios.h  
SourceFilebios_console.c  
SourceFilebios_console.c  
Staticbios_cpu_nap Save power by halting the CPU until the next interrupt
Staticbios_cpu_nap Save power by halting the CPU until the next interrupt
Staticbios_currticks Get current system time in ticks
Staticbios_currticks Get current system time in ticks
Structurebios_disk_device  
Structurebios_disk_device  
Structurebios_disk_driver  
Structurebios_disk_driver  
MacroBIOS_DISK_DRIVER( _name, _fill_drive_name, _min_drive, _max_drive )  
MacroBIOS_DISK_DRIVER( _name, _fill_drive_name, _min_drive, _max_drive )  
Structurebios_disk_loc  
Structurebios_disk_loc  
ConstantBIOS_DISK_MAX_NAME_LEN  
ConstantBIOS_DISK_MAX_NAME_LEN  
Structurebios_disk_sector  
Structurebios_disk_sector  
SourceFilebios_disks.h  
SourceFilebios_disks.h  
Staticbios_find_smbios @file
Staticbios_find_smbios @file
Staticbios_getchar Get character from BIOS console
Staticbios_getchar Get character from BIOS console
Staticbios_handle_cup Handle ANSI CUP (cursor position)
Staticbios_handle_cup Handle ANSI CUP (cursor position)
Staticbios_handle_ed Handle ANSI ED (erase in page)
Staticbios_handle_ed Handle ANSI ED (erase in page)
Staticbios_handle_sgr Handle ANSI SGR (set graphics rendition)
Staticbios_handle_sgr Handle ANSI SGR (set graphics rendition)
Staticbios_iskey Check for character ready to read from BIOS console
Staticbios_iskey Check for character ready to read from BIOS console
MacroBIOS_KEY(scancode)  
MacroBIOS_KEY(scancode)  
ConstantBIOS_KEY_MIN  
ConstantBIOS_KEY_MIN  
ConstantBIOS_LAST_OFFSET  
SourceFilebios_nap.c  
SourceFilebios_nap.c  
SourceFilebios_nap.h  
SourceFilebios_nap.h  
ConstantBIOS_OFFSET_INC  
ConstantBIOS_OFFSET_INC  
Staticbios_putchar Print a character to BIOS console
Staticbios_putchar Print a character to BIOS console
ConstantBIOS_SEG  
ConstantBIOS_SEG  
SourceFilebios_smbios.c  
SourceFilebios_smbios.c  
SourceFilebios_smbios.h  
SourceFilebios_smbios.h  
ConstantBIOS_START_SEG  
ConstantBIOS_START_SEG  
SourceFilebios_timer.c  
SourceFilebios_timer.c  
SourceFilebios_timer.h  
SourceFilebios_timer.h  
SourceFilebiosint.c  
SourceFilebiosint.c  
SourceFilebiosint.h  
SourceFilebiosint.h  
MacroBIT_ASSEMBLE_1( _ptr, _index, _field, _value )  
MacroBIT_ASSEMBLE_2( _ptr, _index, _field, _value, ... )  
MacroBIT_ASSEMBLE_3( _ptr, _index, _field, _value, ... )  
MacroBIT_ASSEMBLE_4( _ptr, _index, _field, _value, ... )  
MacroBIT_ASSEMBLE_5( _ptr, _index, _field, _value, ... )  
MacroBIT_ASSEMBLE_6( _ptr, _index, _field, _value, ... )  
MacroBIT_ASSEMBLE_7( _ptr, _index, _field, _value, ... )  
Structurebit_basher  
Structurebit_basher_operations  
MacroBIT_FILL( _ptr, _index, _assembled )  
MacroBIT_FILL_1( _ptr, _field1, ... )  
MacroBIT_FILL_2( _ptr, _field1, ... )  
MacroBIT_FILL_3( _ptr, _field1, ... )  
MacroBIT_FILL_4( _ptr, _field1, ... )  
MacroBIT_FILL_5( _ptr, _field1, ... )  
MacroBIT_FILL_6( _ptr, _field1, ... )  
MacroBIT_GET( _ptr, _field )  
MacroBIT_GET64( _ptr, _field )  
MacroBIT_MASK( _ptr, _field )  
MacroBIT_MASK_1( _ptr, _index, _field )  
MacroBIT_MASK_2( _ptr, _index, _field, ... )  
MacroBIT_MASK_3( _ptr, _index, _field, ... )  
MacroBIT_MASK_4( _ptr, _index, _field, ... )  
MacroBIT_MASK_5( _ptr, _index, _field, ... )  
MacroBIT_MASK_6( _ptr, _index, _field, ... )  
MacroBIT_MASK_7( _ptr, _index, _field, ... )  
MacroBIT_OFFSET( _ptr, _field )  
SourceFilebit_ops.h  
MacroBIT_SET( _ptr, _field, _value )  
MacroBIT_WIDTH( _ptr, _field )  
ConstantBIT0  
ConstantBIT0  
ConstantBIT0  
ConstantBIT1  
ConstantBIT1  
ConstantBIT10  
ConstantBIT10  
ConstantBIT11  
ConstantBIT11  
ConstantBIT12  
ConstantBIT12  
ConstantBIT13  
ConstantBIT13  
ConstantBIT14  
ConstantBIT14  
ConstantBIT15  
ConstantBIT15  
ConstantBIT15  
ConstantBIT16  
ConstantBIT16  
ConstantBIT17  
ConstantBIT17  
ConstantBIT18  
ConstantBIT18  
ConstantBIT19  
ConstantBIT19  
ConstantBIT2  
ConstantBIT2  
ConstantBIT20  
ConstantBIT20  
ConstantBIT21  
ConstantBIT21  
ConstantBIT22  
ConstantBIT22  
ConstantBIT23  
ConstantBIT23  
ConstantBIT24  
ConstantBIT24  
ConstantBIT25  
ConstantBIT25  
ConstantBIT26  
ConstantBIT26  
ConstantBIT27  
ConstantBIT27  
ConstantBIT28  
ConstantBIT28  
ConstantBIT29  
ConstantBIT29  
ConstantBIT3  
ConstantBIT3  
ConstantBIT30  
ConstantBIT30  
ConstantBIT31  
ConstantBIT31  
ConstantBIT32  
ConstantBIT32_to_cpu  
ConstantBIT32_to_cpu  
ConstantBIT33  
ConstantBIT34  
ConstantBIT35  
ConstantBIT36  
ConstantBIT37  
ConstantBIT38  
ConstantBIT39  
ConstantBIT4  
ConstantBIT4  
ConstantBIT40  
ConstantBIT41  
ConstantBIT42  
ConstantBIT43  
ConstantBIT44  
ConstantBIT45  
ConstantBIT46  
ConstantBIT47  
ConstantBIT48  
ConstantBIT49  
ConstantBIT5  
ConstantBIT5  
ConstantBIT50  
ConstantBIT51  
ConstantBIT52  
ConstantBIT53  
ConstantBIT54  
ConstantBIT55  
ConstantBIT56  
ConstantBIT57  
ConstantBIT58  
ConstantBIT59  
ConstantBIT6  
ConstantBIT6  
ConstantBIT60  
ConstantBIT61  
ConstantBIT62  
ConstantBIT63  
ConstantBIT64_to_cpu  
ConstantBIT64_to_cpu  
ConstantBIT7  
ConstantBIT7  
ConstantBIT8  
ConstantBIT8  
ConstantBIT9  
ConstantBIT9  
SourceFilebitbash.c  
SourceFilebitbash.h  
Structurebitmap  
SourceFilebitmap.c  
SourceFilebitmap.h  
ConstantBITMAP_BLKSIZE  
MacroBITMAP_INDEX( bit )  
MacroBITMAP_MASK( bit )  
Functionbitmap_resize @file
Functionbitmap_set Set bit in bitmap
Functionbitmap_test Test bit in bitmap
SourceFilebitops.c  
SourceFilebitops.h  
MacroBITS32(O,S)  
ConstantBITSIZE  
ConstantBITSIZE  
Structureblock_device  
Structureblock_device_operations  
SourceFileblockdev.h  
ConstantBLOCKELEMENT_FULL_BLOCK  
ConstantBLOCKELEMENT_LIGHT_SHADE  
ConstantBMCR_ANENABLE Enable auto negotiation
ConstantBMCR_ANRESTART Auto negotiation restart
ConstantBMCR_AUTO  
ConstantBMCR_CTST Collision test
ConstantBMCR_FDX  
ConstantBMCR_FULLDPLX Full duplex
ConstantBMCR_ISO  
ConstantBMCR_ISOLATE Disconnect DP83840 from MII
ConstantBMCR_LBK  
ConstantBMCR_LOOPBACK TXD loopback bits
ConstantBMCR_PD  
ConstantBMCR_PDOWN Powerdown the DP83840
ConstantBMCR_REAUTO  
ConstantBMCR_RESET  
ConstantBMCR_RESET Reset the DP83840
ConstantBMCR_RESV Unused...
ConstantBMCR_SPEED100  
ConstantBMCR_SPEED100 Select 100Mbps
ConstantBMCR_SPEED1000 MSB of Speed (1000)
ConstantBMCR_SPEED1G  
ConstantBMSR_100BASE4 Can do 100mbps, 4k packets
ConstantBMSR_100FULL Can do 100mbps, full-duplex
ConstantBMSR_100FULL2 Can do 100BASE-T2 FDX
ConstantBMSR_100HALF Can do 100mbps, half-duplex
ConstantBMSR_100HALF2 Can do 100BASE-T2 HDX
ConstantBMSR_10FULL Can do 10mbps, full-duplex
ConstantBMSR_10HALF Can do 10mbps, half-duplex
ConstantBMSR_ANEGCAPABLE Able to do auto-negotiation
ConstantBMSR_ANEGCOMPLETE Auto-negotiation complete
ConstantBMSR_AUTOCM  
ConstantBMSR_ERCAP Ext-reg capability
ConstantBMSR_ESTATEN Extended Status in R15
ConstantBMSR_JCD Jabber detected
ConstantBMSR_LNK  
ConstantBMSR_LSTATUS Link status
ConstantBMSR_RESV Unused...
ConstantBMSR_RFAULT Remote fault detected
ConstantBNC  
ConstantBNC_BIT  
Structurebnx2  
SourceFilebnx2.c  
SourceFilebnx2.h  
Staticbnx2_5706s_linkup  
Staticbnx2_5708s_linkup  
Staticbnx2_alloc_bad_rbuf  
Staticbnx2_alloc_mem  
ConstantBNX2_BC_STATE  
ConstantBNX2_BC_STATE_APPLY_WKARND  
ConstantBNX2_BC_STATE_BC_DBG_CMD_LOOP_C  
ConstantBNX2_BC_STATE_BC_DBG_CMD_LOOP_I  
ConstantBNX2_BC_STATE_BC_DBG_CMD_SIGNAT  
ConstantBNX2_BC_STATE_BC_DBG_CMD_SIGNAT  
ConstantBNX2_BC_STATE_BC1_START  
ConstantBNX2_BC_STATE_DEBUG_CMD  
ConstantBNX2_BC_STATE_ERR_BAD_BC2_CRC  
ConstantBNX2_BC_STATE_ERR_BAD_VERSION  
ConstantBNX2_BC_STATE_ERR_BC1_LOOP  
ConstantBNX2_BC_STATE_ERR_DRV_DEAD  
ConstantBNX2_BC_STATE_ERR_MASK  
ConstantBNX2_BC_STATE_ERR_NO_RXP  
ConstantBNX2_BC_STATE_ERR_TOO_MANY_RBUF  
ConstantBNX2_BC_STATE_ERR_UNKNOWN_CMD  
ConstantBNX2_BC_STATE_GET_NVM_CFG1  
ConstantBNX2_BC_STATE_GET_NVM_CFG2  
ConstantBNX2_BC_STATE_GOING_BC2  
ConstantBNX2_BC_STATE_GOING_DIAG  
ConstantBNX2_BC_STATE_INIT_VID  
ConstantBNX2_BC_STATE_LOAD_BC2  
ConstantBNX2_BC_STATE_PROG_BAR  
ConstantBNX2_BC_STATE_RESET_TYPE  
ConstantBNX2_BC_STATE_RESET_TYPE_DRV_DI  
ConstantBNX2_BC_STATE_RESET_TYPE_DRV_MA  
ConstantBNX2_BC_STATE_RESET_TYPE_DRV_RE  
ConstantBNX2_BC_STATE_RESET_TYPE_DRV_SH  
ConstantBNX2_BC_STATE_RESET_TYPE_DRV_UN  
ConstantBNX2_BC_STATE_RESET_TYPE_DRV_WO  
ConstantBNX2_BC_STATE_RESET_TYPE_NONE  
ConstantBNX2_BC_STATE_RESET_TYPE_PCI  
ConstantBNX2_BC_STATE_RESET_TYPE_SIG  
ConstantBNX2_BC_STATE_RESET_TYPE_SIG_MA  
MacroBNX2_BC_STATE_RESET_TYPE_VALUE(msg)  
ConstantBNX2_BC_STATE_RESET_TYPE_VAUX  
ConstantBNX2_BC_STATE_RT_DRV_CMD  
ConstantBNX2_BC_STATE_RT_DRV_PULSE  
ConstantBNX2_BC_STATE_RT_FINAL_INIT  
ConstantBNX2_BC_STATE_RT_FIOEVTS  
ConstantBNX2_BC_STATE_RT_GOING_D3  
ConstantBNX2_BC_STATE_RT_LOW_POWER  
ConstantBNX2_BC_STATE_RT_OTHER_FW  
ConstantBNX2_BC_STATE_RT_SET_WOL  
ConstantBNX2_BC_STATE_RT_WKARND  
ConstantBNX2_BC_STATE_SIGN  
ConstantBNX2_BC_STATE_SIGN_MASK  
ConstantBNX2_COM_COMQ_FTQ_CMD  
ConstantBNX2_COM_COMQ_FTQ_CMD_ADD_DATA  
ConstantBNX2_COM_COMQ_FTQ_CMD_ADD_INTER  
ConstantBNX2_COM_COMQ_FTQ_CMD_BUSY  
ConstantBNX2_COM_COMQ_FTQ_CMD_INTERVENE  
ConstantBNX2_COM_COMQ_FTQ_CMD_OFFSET  
ConstantBNX2_COM_COMQ_FTQ_CMD_POP  
ConstantBNX2_COM_COMQ_FTQ_CMD_RD_DATA  
ConstantBNX2_COM_COMQ_FTQ_CMD_SFT_RESET  
ConstantBNX2_COM_COMQ_FTQ_CMD_WR_TOP  
ConstantBNX2_COM_COMQ_FTQ_CMD_WR_TOP_0  
ConstantBNX2_COM_COMQ_FTQ_CMD_WR_TOP_1  
ConstantBNX2_COM_COMQ_FTQ_CTL  
ConstantBNX2_COM_COMQ_FTQ_CTL_CUR_DEPTH  
ConstantBNX2_COM_COMQ_FTQ_CTL_FORCE_INT  
ConstantBNX2_COM_COMQ_FTQ_CTL_INTERVENE  
ConstantBNX2_COM_COMQ_FTQ_CTL_MAX_DEPTH  
ConstantBNX2_COM_COMQ_FTQ_CTL_OVERFLOW  
ConstantBNX2_COM_COMQ_FTQ_DATA  
ConstantBNX2_COM_COMTQ_FTQ_CMD  
ConstantBNX2_COM_COMTQ_FTQ_CMD_ADD_DATA  
ConstantBNX2_COM_COMTQ_FTQ_CMD_ADD_INTE  
ConstantBNX2_COM_COMTQ_FTQ_CMD_BUSY  
ConstantBNX2_COM_COMTQ_FTQ_CMD_INTERVEN  
ConstantBNX2_COM_COMTQ_FTQ_CMD_OFFSET  
ConstantBNX2_COM_COMTQ_FTQ_CMD_POP  
ConstantBNX2_COM_COMTQ_FTQ_CMD_RD_DATA  
ConstantBNX2_COM_COMTQ_FTQ_CMD_SFT_RESE  
ConstantBNX2_COM_COMTQ_FTQ_CMD_WR_TOP  
ConstantBNX2_COM_COMTQ_FTQ_CMD_WR_TOP_0  
ConstantBNX2_COM_COMTQ_FTQ_CMD_WR_TOP_1  
ConstantBNX2_COM_COMTQ_FTQ_CTL  
ConstantBNX2_COM_COMTQ_FTQ_CTL_CUR_DEPT  
ConstantBNX2_COM_COMTQ_FTQ_CTL_FORCE_IN  
ConstantBNX2_COM_COMTQ_FTQ_CTL_INTERVEN  
ConstantBNX2_COM_COMTQ_FTQ_CTL_MAX_DEPT  
ConstantBNX2_COM_COMTQ_FTQ_CTL_OVERFLOW  
ConstantBNX2_COM_COMTQ_FTQ_DATA  
ConstantBNX2_COM_COMXQ_FTQ_CMD  
ConstantBNX2_COM_COMXQ_FTQ_CMD_ADD_DATA  
ConstantBNX2_COM_COMXQ_FTQ_CMD_ADD_INTE  
ConstantBNX2_COM_COMXQ_FTQ_CMD_BUSY  
ConstantBNX2_COM_COMXQ_FTQ_CMD_INTERVEN  
ConstantBNX2_COM_COMXQ_FTQ_CMD_OFFSET  
ConstantBNX2_COM_COMXQ_FTQ_CMD_POP  
ConstantBNX2_COM_COMXQ_FTQ_CMD_RD_DATA  
ConstantBNX2_COM_COMXQ_FTQ_CMD_SFT_RESE  
ConstantBNX2_COM_COMXQ_FTQ_CMD_WR_TOP  
ConstantBNX2_COM_COMXQ_FTQ_CMD_WR_TOP_0  
ConstantBNX2_COM_COMXQ_FTQ_CMD_WR_TOP_1  
ConstantBNX2_COM_COMXQ_FTQ_CTL  
ConstantBNX2_COM_COMXQ_FTQ_CTL_CUR_DEPT  
ConstantBNX2_COM_COMXQ_FTQ_CTL_FORCE_IN  
ConstantBNX2_COM_COMXQ_FTQ_CTL_INTERVEN  
ConstantBNX2_COM_COMXQ_FTQ_CTL_MAX_DEPT  
ConstantBNX2_COM_COMXQ_FTQ_CTL_OVERFLOW  
ConstantBNX2_COM_COMXQ_FTQ_DATA  
ConstantBNX2_COM_CPU_DATA_ACCESS  
ConstantBNX2_COM_CPU_DEBUG_VECT_PEEK  
ConstantBNX2_COM_CPU_DEBUG_VECT_PEEK_1_  
ConstantBNX2_COM_CPU_DEBUG_VECT_PEEK_1_  
ConstantBNX2_COM_CPU_DEBUG_VECT_PEEK_1_  
ConstantBNX2_COM_CPU_DEBUG_VECT_PEEK_2_  
ConstantBNX2_COM_CPU_DEBUG_VECT_PEEK_2_  
ConstantBNX2_COM_CPU_DEBUG_VECT_PEEK_2_  
ConstantBNX2_COM_CPU_EVENT_MASK  
ConstantBNX2_COM_CPU_EVENT_MASK_ALIGN_H  
ConstantBNX2_COM_CPU_EVENT_MASK_BAD_DAT  
ConstantBNX2_COM_CPU_EVENT_MASK_BAD_INS  
ConstantBNX2_COM_CPU_EVENT_MASK_BAD_PC_  
ConstantBNX2_COM_CPU_EVENT_MASK_BREAKPO  
ConstantBNX2_COM_CPU_EVENT_MASK_FIO_ABO  
ConstantBNX2_COM_CPU_EVENT_MASK_INTERRU  
ConstantBNX2_COM_CPU_EVENT_MASK_PAGE_0_  
ConstantBNX2_COM_CPU_EVENT_MASK_PAGE_0_  
ConstantBNX2_COM_CPU_EVENT_MASK_SOFT_HA  
ConstantBNX2_COM_CPU_EVENT_MASK_SPAD_UN  
ConstantBNX2_COM_CPU_HW_BREAKPOINT  
ConstantBNX2_COM_CPU_HW_BREAKPOINT_ADDR  
ConstantBNX2_COM_CPU_HW_BREAKPOINT_DISA  
ConstantBNX2_COM_CPU_INSTRUCTION  
ConstantBNX2_COM_CPU_INTERRUPT_ENABLE  
ConstantBNX2_COM_CPU_INTERRUPT_SAVED_PC  
ConstantBNX2_COM_CPU_INTERRUPT_VECTOR  
ConstantBNX2_COM_CPU_LAST_BRANCH_ADDR  
ConstantBNX2_COM_CPU_LAST_BRANCH_ADDR_L  
ConstantBNX2_COM_CPU_LAST_BRANCH_ADDR_T  
ConstantBNX2_COM_CPU_LAST_BRANCH_ADDR_T  
ConstantBNX2_COM_CPU_LAST_BRANCH_ADDR_T  
ConstantBNX2_COM_CPU_MODE  
ConstantBNX2_COM_CPU_MODE_BAD_DATA_HALT  
ConstantBNX2_COM_CPU_MODE_BAD_INST_HALT  
ConstantBNX2_COM_CPU_MODE_FIO_ABORT_HAL  
ConstantBNX2_COM_CPU_MODE_INTERRUPT_ENA  
ConstantBNX2_COM_CPU_MODE_LOCAL_RST  
ConstantBNX2_COM_CPU_MODE_MSG_BIT1  
ConstantBNX2_COM_CPU_MODE_PAGE_0_DATA_E  
ConstantBNX2_COM_CPU_MODE_PAGE_0_INST_E  
ConstantBNX2_COM_CPU_MODE_SOFT_HALT  
ConstantBNX2_COM_CPU_MODE_SPAD_UNDERFLO  
ConstantBNX2_COM_CPU_MODE_STEP_ENA  
ConstantBNX2_COM_CPU_PROGRAM_COUNTER  
ConstantBNX2_COM_CPU_REG_FILE  
ConstantBNX2_COM_CPU_STATE  
ConstantBNX2_COM_CPU_STATE_ALIGN_HALTED  
ConstantBNX2_COM_CPU_STATE_BAD_DATA_ADD  
ConstantBNX2_COM_CPU_STATE_BAD_INST_HAL  
ConstantBNX2_COM_CPU_STATE_BAD_pc_HALTE  
ConstantBNX2_COM_CPU_STATE_BLOCKED_READ  
ConstantBNX2_COM_CPU_STATE_BREAKPOINT  
ConstantBNX2_COM_CPU_STATE_DATA_ACCESS_  
ConstantBNX2_COM_CPU_STATE_FIO_ABORT_HA  
ConstantBNX2_COM_CPU_STATE_INST_FETCH_S  
ConstantBNX2_COM_CPU_STATE_INTERRRUPT  
ConstantBNX2_COM_CPU_STATE_PAGE_0_DATA_  
ConstantBNX2_COM_CPU_STATE_PAGE_0_INST_  
ConstantBNX2_COM_CPU_STATE_SOFT_HALTED  
ConstantBNX2_COM_CPU_STATE_SPAD_UNDERFL  
ConstantBNX2_COM_SCRATCH  
Staticbnx2_copper_linkup  
ConstantBNX2_CP_CPQ_FTQ_CMD  
ConstantBNX2_CP_CPQ_FTQ_CMD_ADD_DATA  
ConstantBNX2_CP_CPQ_FTQ_CMD_ADD_INTERVE  
ConstantBNX2_CP_CPQ_FTQ_CMD_BUSY  
ConstantBNX2_CP_CPQ_FTQ_CMD_INTERVENE_C  
ConstantBNX2_CP_CPQ_FTQ_CMD_OFFSET  
ConstantBNX2_CP_CPQ_FTQ_CMD_POP  
ConstantBNX2_CP_CPQ_FTQ_CMD_RD_DATA  
ConstantBNX2_CP_CPQ_FTQ_CMD_SFT_RESET  
ConstantBNX2_CP_CPQ_FTQ_CMD_WR_TOP  
ConstantBNX2_CP_CPQ_FTQ_CMD_WR_TOP_0  
ConstantBNX2_CP_CPQ_FTQ_CMD_WR_TOP_1  
ConstantBNX2_CP_CPQ_FTQ_CTL  
ConstantBNX2_CP_CPQ_FTQ_CTL_CUR_DEPTH  
ConstantBNX2_CP_CPQ_FTQ_CTL_FORCE_INTER  
ConstantBNX2_CP_CPQ_FTQ_CTL_INTERVENE  
ConstantBNX2_CP_CPQ_FTQ_CTL_MAX_DEPTH  
ConstantBNX2_CP_CPQ_FTQ_CTL_OVERFLOW  
ConstantBNX2_CP_CPQ_FTQ_DATA  
ConstantBNX2_CP_CPU_DATA_ACCESS  
ConstantBNX2_CP_CPU_DEBUG_VECT_PEEK  
ConstantBNX2_CP_CPU_DEBUG_VECT_PEEK_1_P  
ConstantBNX2_CP_CPU_DEBUG_VECT_PEEK_1_S  
ConstantBNX2_CP_CPU_DEBUG_VECT_PEEK_1_V  
ConstantBNX2_CP_CPU_DEBUG_VECT_PEEK_2_P  
ConstantBNX2_CP_CPU_DEBUG_VECT_PEEK_2_S  
ConstantBNX2_CP_CPU_DEBUG_VECT_PEEK_2_V  
ConstantBNX2_CP_CPU_EVENT_MASK  
ConstantBNX2_CP_CPU_EVENT_MASK_ALIGN_HA  
ConstantBNX2_CP_CPU_EVENT_MASK_BAD_DATA  
ConstantBNX2_CP_CPU_EVENT_MASK_BAD_INST  
ConstantBNX2_CP_CPU_EVENT_MASK_BAD_PC_H  
ConstantBNX2_CP_CPU_EVENT_MASK_BREAKPOI  
ConstantBNX2_CP_CPU_EVENT_MASK_FIO_ABOR  
ConstantBNX2_CP_CPU_EVENT_MASK_INTERRUP  
ConstantBNX2_CP_CPU_EVENT_MASK_PAGE_0_D  
ConstantBNX2_CP_CPU_EVENT_MASK_PAGE_0_I  
ConstantBNX2_CP_CPU_EVENT_MASK_SOFT_HAL  
ConstantBNX2_CP_CPU_EVENT_MASK_SPAD_UND  
ConstantBNX2_CP_CPU_HW_BREAKPOINT  
ConstantBNX2_CP_CPU_HW_BREAKPOINT_ADDRE  
ConstantBNX2_CP_CPU_HW_BREAKPOINT_DISAB  
ConstantBNX2_CP_CPU_INSTRUCTION  
ConstantBNX2_CP_CPU_INTERRUPT_ENABLE  
ConstantBNX2_CP_CPU_INTERRUPT_SAVED_PC  
ConstantBNX2_CP_CPU_INTERRUPT_VECTOR  
ConstantBNX2_CP_CPU_LAST_BRANCH_ADDR  
ConstantBNX2_CP_CPU_LAST_BRANCH_ADDR_LB  
ConstantBNX2_CP_CPU_LAST_BRANCH_ADDR_TY  
ConstantBNX2_CP_CPU_LAST_BRANCH_ADDR_TY  
ConstantBNX2_CP_CPU_LAST_BRANCH_ADDR_TY  
ConstantBNX2_CP_CPU_MODE  
ConstantBNX2_CP_CPU_MODE_BAD_DATA_HALT_  
ConstantBNX2_CP_CPU_MODE_BAD_INST_HALT_  
ConstantBNX2_CP_CPU_MODE_FIO_ABORT_HALT  
ConstantBNX2_CP_CPU_MODE_INTERRUPT_ENA  
ConstantBNX2_CP_CPU_MODE_LOCAL_RST  
ConstantBNX2_CP_CPU_MODE_MSG_BIT1  
ConstantBNX2_CP_CPU_MODE_PAGE_0_DATA_EN  
ConstantBNX2_CP_CPU_MODE_PAGE_0_INST_EN  
ConstantBNX2_CP_CPU_MODE_SOFT_HALT  
ConstantBNX2_CP_CPU_MODE_SPAD_UNDERFLOW  
ConstantBNX2_CP_CPU_MODE_STEP_ENA  
ConstantBNX2_CP_CPU_PROGRAM_COUNTER  
ConstantBNX2_CP_CPU_REG_FILE  
ConstantBNX2_CP_CPU_STATE  
ConstantBNX2_CP_CPU_STATE_ALIGN_HALTED  
ConstantBNX2_CP_CPU_STATE_BAD_DATA_ADDR  
ConstantBNX2_CP_CPU_STATE_BAD_INST_HALT  
ConstantBNX2_CP_CPU_STATE_BAD_pc_HALTED  
ConstantBNX2_CP_CPU_STATE_BLOCKED_READ  
ConstantBNX2_CP_CPU_STATE_BREAKPOINT  
ConstantBNX2_CP_CPU_STATE_DATA_ACCESS_S  
ConstantBNX2_CP_CPU_STATE_FIO_ABORT_HAL  
ConstantBNX2_CP_CPU_STATE_INST_FETCH_ST  
ConstantBNX2_CP_CPU_STATE_INTERRRUPT  
ConstantBNX2_CP_CPU_STATE_PAGE_0_DATA_H  
ConstantBNX2_CP_CPU_STATE_PAGE_0_INST_H  
ConstantBNX2_CP_CPU_STATE_SOFT_HALTED  
ConstantBNX2_CP_CPU_STATE_SPAD_UNDERFLO  
ConstantBNX2_CP_SCRATCH  
ConstantBNX2_CTX_ACCESS_STATUS  
ConstantBNX2_CTX_ACCESS_STATUS_ACCESSME  
ConstantBNX2_CTX_ACCESS_STATUS_ACCESSME  
ConstantBNX2_CTX_ACCESS_STATUS_MASTEREN  
ConstantBNX2_CTX_ACCESS_STATUS_PAGETABL  
ConstantBNX2_CTX_ACCESS_STATUS_QUALIFIE  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_0  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_0_CID  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_0_MOD  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_0_TYP  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_1  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_2  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_3  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_4  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_5  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_6  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_7  
ConstantBNX2_CTX_CHNL_LOCK_STATUS_8  
ConstantBNX2_CTX_COMMAND  
ConstantBNX2_CTX_COMMAND_ENABLED  
ConstantBNX2_CTX_DATA  
ConstantBNX2_CTX_DATA_ADR  
ConstantBNX2_CTX_DATA_ADR_DATA_ADR  
ConstantBNX2_CTX_DBG_LOCK_STATUS  
ConstantBNX2_CTX_DBG_LOCK_STATUS_MATCH  
ConstantBNX2_CTX_DBG_LOCK_STATUS_SM  
ConstantBNX2_CTX_LOCK  
ConstantBNX2_CTX_LOCK_CID_VALUE  
ConstantBNX2_CTX_LOCK_GRANTED  
ConstantBNX2_CTX_LOCK_MODE  
ConstantBNX2_CTX_LOCK_MODE_IMMEDIATE  
ConstantBNX2_CTX_LOCK_MODE_SURE  
ConstantBNX2_CTX_LOCK_MODE_UNLOCK  
ConstantBNX2_CTX_LOCK_REQ  
ConstantBNX2_CTX_LOCK_STATUS  
ConstantBNX2_CTX_LOCK_TYPE  
ConstantBNX2_CTX_LOCK_TYPE_LOCK_TYPE_CO  
ConstantBNX2_CTX_LOCK_TYPE_LOCK_TYPE_PR  
ConstantBNX2_CTX_LOCK_TYPE_LOCK_TYPE_TI  
ConstantBNX2_CTX_LOCK_TYPE_LOCK_TYPE_TX  
ConstantBNX2_CTX_LOCK_TYPE_LOCK_TYPE_VO  
ConstantBNX2_CTX_PAGE_TBL  
ConstantBNX2_CTX_PAGE_TBL_PAGE_TBL  
ConstantBNX2_CTX_STATUS  
ConstantBNX2_CTX_STATUS_ACC_STALL_STAT  
ConstantBNX2_CTX_STATUS_LOCK_STALL_STAT  
ConstantBNX2_CTX_STATUS_LOCK_WAIT  
ConstantBNX2_CTX_STATUS_READ_STAT  
ConstantBNX2_CTX_STATUS_WRITE_STAT  
ConstantBNX2_CTX_VIRT_ADDR  
ConstantBNX2_CTX_VIRT_ADDR_VIRT_ADDR  
Staticbnx2_ctx_wr  
ConstantBNX2_DEV_INFO_BC_REV  
ConstantBNX2_DEV_INFO_DRV_ALWAYS_ALIVE  
ConstantBNX2_DEV_INFO_FEATURE_CFG_VALID  
ConstantBNX2_DEV_INFO_FORMAT_REV  
ConstantBNX2_DEV_INFO_FORMAT_REV_ID  
ConstantBNX2_DEV_INFO_FORMAT_REV_MASK  
ConstantBNX2_DEV_INFO_PER_PORT_HW_CONFI  
ConstantBNX2_DEV_INFO_SECONDARY_PORT  
ConstantBNX2_DEV_INFO_SIGNATURE  
ConstantBNX2_DEV_INFO_SIGNATURE_MAGIC  
ConstantBNX2_DEV_INFO_SIGNATURE_MAGIC_M  
Staticbnx2_disable  
Staticbnx2_disable_int  
Staticbnx2_disable_nvram_access  
ConstantBNX2_DMA_ARB_STAT_00  
ConstantBNX2_DMA_ARB_STAT_00_CUR_BINMST  
ConstantBNX2_DMA_ARB_STAT_00_MASTER  
ConstantBNX2_DMA_ARB_STAT_00_MASTER_ENC  
ConstantBNX2_DMA_ARB_STAT_01  
ConstantBNX2_DMA_ARB_STAT_01_HPB_RPTR  
ConstantBNX2_DMA_ARB_STAT_01_HPB_WPTR  
ConstantBNX2_DMA_ARB_STAT_01_HPR_RPTR  
ConstantBNX2_DMA_ARB_STAT_01_HPR_WPTR  
ConstantBNX2_DMA_ARB_STAT_01_LPB_RPTR  
ConstantBNX2_DMA_ARB_STAT_01_LPB_WPTR  
ConstantBNX2_DMA_ARB_STAT_01_LPR_RPTR  
ConstantBNX2_DMA_ARB_STAT_01_LPR_WPTR  
ConstantBNX2_DMA_BLACKOUT  
ConstantBNX2_DMA_BLACKOUT_2ND_RD_RETRY_  
ConstantBNX2_DMA_BLACKOUT_RD_RETRY_BLAC  
ConstantBNX2_DMA_BLACKOUT_WR_RETRY_BLAC  
ConstantBNX2_DMA_COMMAND  
ConstantBNX2_DMA_COMMAND_ENABLE  
ConstantBNX2_DMA_CONFIG  
ConstantBNX2_DMA_CONFIG_BIG_SIZE  
ConstantBNX2_DMA_CONFIG_BIG_SIZE_128  
ConstantBNX2_DMA_CONFIG_BIG_SIZE_256  
ConstantBNX2_DMA_CONFIG_BIG_SIZE_512  
ConstantBNX2_DMA_CONFIG_BIG_SIZE_64  
ConstantBNX2_DMA_CONFIG_BIG_SIZE_NONE  
ConstantBNX2_DMA_CONFIG_CNTL_BYTE_SWAP  
ConstantBNX2_DMA_CONFIG_CNTL_FPGA_MODE  
ConstantBNX2_DMA_CONFIG_CNTL_PCI_COMP_D  
ConstantBNX2_DMA_CONFIG_CNTL_PING_PONG_  
ConstantBNX2_DMA_CONFIG_CNTL_TWO_DMA  
ConstantBNX2_DMA_CONFIG_CNTL_WORD_SWAP  
ConstantBNX2_DMA_CONFIG_DATA_BYTE_SWAP  
ConstantBNX2_DMA_CONFIG_DATA_WORD_SWAP  
ConstantBNX2_DMA_CONFIG_NO_RCHANS_IN_US  
ConstantBNX2_DMA_CONFIG_NO_WCHANS_IN_US  
ConstantBNX2_DMA_CONFIG_ONE_DMA  
ConstantBNX2_DMA_CONFIG_PCI_CLK_CMP_BIT  
ConstantBNX2_DMA_CONFIG_PCI_FAST_CLK_CM  
ConstantBNX2_DMA_FUSE_CTRL0_CMD  
ConstantBNX2_DMA_FUSE_CTRL0_CMD_LOAD  
ConstantBNX2_DMA_FUSE_CTRL0_CMD_PWRUP_D  
ConstantBNX2_DMA_FUSE_CTRL0_CMD_SEL  
ConstantBNX2_DMA_FUSE_CTRL0_CMD_SHIFT  
ConstantBNX2_DMA_FUSE_CTRL0_CMD_SHIFT_D  
ConstantBNX2_DMA_FUSE_CTRL0_DATA  
ConstantBNX2_DMA_FUSE_CTRL1_CMD  
ConstantBNX2_DMA_FUSE_CTRL1_CMD_LOAD  
ConstantBNX2_DMA_FUSE_CTRL1_CMD_PWRUP_D  
ConstantBNX2_DMA_FUSE_CTRL1_CMD_SEL  
ConstantBNX2_DMA_FUSE_CTRL1_CMD_SHIFT  
ConstantBNX2_DMA_FUSE_CTRL1_CMD_SHIFT_D  
ConstantBNX2_DMA_FUSE_CTRL1_DATA  
ConstantBNX2_DMA_FUSE_CTRL2_CMD  
ConstantBNX2_DMA_FUSE_CTRL2_CMD_LOAD  
ConstantBNX2_DMA_FUSE_CTRL2_CMD_PWRUP_D  
ConstantBNX2_DMA_FUSE_CTRL2_CMD_SEL  
ConstantBNX2_DMA_FUSE_CTRL2_CMD_SHIFT  
ConstantBNX2_DMA_FUSE_CTRL2_CMD_SHIFT_D  
ConstantBNX2_DMA_FUSE_CTRL2_DATA  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_0  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_1  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_2  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_3  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_4  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_5  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_6  
ConstantBNX2_DMA_RCHAN_ASSIGNMENT_7  
ConstantBNX2_DMA_RCHAN_STAT  
ConstantBNX2_DMA_RCHAN_STAT_00  
ConstantBNX2_DMA_RCHAN_STAT_00_RCHAN_ST  
ConstantBNX2_DMA_RCHAN_STAT_01  
ConstantBNX2_DMA_RCHAN_STAT_01_RCHAN_ST  
ConstantBNX2_DMA_RCHAN_STAT_02  
ConstantBNX2_DMA_RCHAN_STAT_02_BYTE_SWA  
ConstantBNX2_DMA_RCHAN_STAT_02_LENGTH  
ConstantBNX2_DMA_RCHAN_STAT_02_PRIORITY  
ConstantBNX2_DMA_RCHAN_STAT_02_WORD_SWA  
ConstantBNX2_DMA_RCHAN_STAT_10  
ConstantBNX2_DMA_RCHAN_STAT_11  
ConstantBNX2_DMA_RCHAN_STAT_12  
ConstantBNX2_DMA_RCHAN_STAT_20  
ConstantBNX2_DMA_RCHAN_STAT_21  
ConstantBNX2_DMA_RCHAN_STAT_22  
ConstantBNX2_DMA_RCHAN_STAT_30  
ConstantBNX2_DMA_RCHAN_STAT_31  
ConstantBNX2_DMA_RCHAN_STAT_32  
ConstantBNX2_DMA_RCHAN_STAT_40  
ConstantBNX2_DMA_RCHAN_STAT_41  
ConstantBNX2_DMA_RCHAN_STAT_42  
ConstantBNX2_DMA_RCHAN_STAT_50  
ConstantBNX2_DMA_RCHAN_STAT_51  
ConstantBNX2_DMA_RCHAN_STAT_52  
ConstantBNX2_DMA_RCHAN_STAT_60  
ConstantBNX2_DMA_RCHAN_STAT_61  
ConstantBNX2_DMA_RCHAN_STAT_62  
ConstantBNX2_DMA_RCHAN_STAT_70  
ConstantBNX2_DMA_RCHAN_STAT_71  
ConstantBNX2_DMA_RCHAN_STAT_72  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_0  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_1  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_2  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_3  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_4  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_5  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_6  
ConstantBNX2_DMA_RCHAN_STAT_COMP_CODE_7  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_0  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_1  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_2  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_3  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_4  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_5  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_6  
ConstantBNX2_DMA_RCHAN_STAT_PAR_ERR_7  
ConstantBNX2_DMA_STATUS  
ConstantBNX2_DMA_STATUS_BIG_READ_DELAY_  
ConstantBNX2_DMA_STATUS_BIG_READ_RETRY_  
ConstantBNX2_DMA_STATUS_BIG_READ_TRANSF  
ConstantBNX2_DMA_STATUS_BIG_WRITE_DELAY  
ConstantBNX2_DMA_STATUS_BIG_WRITE_RETRY  
ConstantBNX2_DMA_STATUS_BIG_WRITE_TRANS  
ConstantBNX2_DMA_STATUS_PAR_ERROR_STATE  
ConstantBNX2_DMA_STATUS_READ_DELAY_PCI_  
ConstantBNX2_DMA_STATUS_READ_TRANSFERS_  
ConstantBNX2_DMA_STATUS_WRITE_DELAY_PCI  
ConstantBNX2_DMA_STATUS_WRITE_TRANSFERS  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_0  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_1  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_2  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_3  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_4  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_5  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_6  
ConstantBNX2_DMA_WCHAN_ASSIGNMENT_7  
ConstantBNX2_DMA_WCHAN_STAT  
ConstantBNX2_DMA_WCHAN_STAT_00  
ConstantBNX2_DMA_WCHAN_STAT_00_WCHAN_ST  
ConstantBNX2_DMA_WCHAN_STAT_01  
ConstantBNX2_DMA_WCHAN_STAT_01_WCHAN_ST  
ConstantBNX2_DMA_WCHAN_STAT_02  
ConstantBNX2_DMA_WCHAN_STAT_02_BYTE_SWA  
ConstantBNX2_DMA_WCHAN_STAT_02_LENGTH  
ConstantBNX2_DMA_WCHAN_STAT_02_PRIORITY  
ConstantBNX2_DMA_WCHAN_STAT_02_WORD_SWA  
ConstantBNX2_DMA_WCHAN_STAT_10  
ConstantBNX2_DMA_WCHAN_STAT_11  
ConstantBNX2_DMA_WCHAN_STAT_12  
ConstantBNX2_DMA_WCHAN_STAT_20  
ConstantBNX2_DMA_WCHAN_STAT_21  
ConstantBNX2_DMA_WCHAN_STAT_22  
ConstantBNX2_DMA_WCHAN_STAT_30  
ConstantBNX2_DMA_WCHAN_STAT_31  
ConstantBNX2_DMA_WCHAN_STAT_32  
ConstantBNX2_DMA_WCHAN_STAT_40  
ConstantBNX2_DMA_WCHAN_STAT_41  
ConstantBNX2_DMA_WCHAN_STAT_42  
ConstantBNX2_DMA_WCHAN_STAT_50  
ConstantBNX2_DMA_WCHAN_STAT_51  
ConstantBNX2_DMA_WCHAN_STAT_52  
ConstantBNX2_DMA_WCHAN_STAT_60  
ConstantBNX2_DMA_WCHAN_STAT_61  
ConstantBNX2_DMA_WCHAN_STAT_62  
ConstantBNX2_DMA_WCHAN_STAT_70  
ConstantBNX2_DMA_WCHAN_STAT_71  
ConstantBNX2_DMA_WCHAN_STAT_72  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_0  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_1  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_2  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_3  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_4  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_5  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_6  
ConstantBNX2_DMA_WCHAN_STAT_COMP_CODE_7  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_0  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_1  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_2  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_3  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_4  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_5  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_6  
ConstantBNX2_DMA_WCHAN_STAT_PAR_ERR_7  
ConstantBNX2_DRV_MB  
ConstantBNX2_DRV_MSG_CODE  
ConstantBNX2_DRV_MSG_CODE_DIAG  
ConstantBNX2_DRV_MSG_CODE_FW_TIMEOUT  
ConstantBNX2_DRV_MSG_CODE_PULSE  
ConstantBNX2_DRV_MSG_CODE_RESET  
ConstantBNX2_DRV_MSG_CODE_SHUTDOWN  
ConstantBNX2_DRV_MSG_CODE_SUSPEND_NO_WO  
ConstantBNX2_DRV_MSG_CODE_SUSPEND_WOL  
ConstantBNX2_DRV_MSG_CODE_UNLOAD  
ConstantBNX2_DRV_MSG_DATA  
ConstantBNX2_DRV_MSG_DATA_PULSE_CODE_AL  
ConstantBNX2_DRV_MSG_DATA_WAIT0  
ConstantBNX2_DRV_MSG_DATA_WAIT1  
ConstantBNX2_DRV_MSG_DATA_WAIT2  
ConstantBNX2_DRV_MSG_DATA_WAIT3  
ConstantBNX2_DRV_MSG_SEQ  
ConstantBNX2_DRV_PULSE_MB  
ConstantBNX2_DRV_PULSE_SEQ_MASK  
ConstantBNX2_DRV_RESET_SIGNATURE  
ConstantBNX2_DRV_RESET_SIGNATURE_MAGIC HAVK
ConstantBNX2_EMAC_ATTENTION_ENA  
ConstantBNX2_EMAC_ATTENTION_ENA_AP_ERRO  
ConstantBNX2_EMAC_ATTENTION_ENA_LINK  
ConstantBNX2_EMAC_ATTENTION_ENA_MI_COMP  
ConstantBNX2_EMAC_ATTENTION_ENA_MI_INT  
ConstantBNX2_EMAC_BACKOFF_SEED  
ConstantBNX2_EMAC_BACKOFF_SEED_EMAC_BAC  
ConstantBNX2_EMAC_LED  
ConstantBNX2_EMAC_LED_1000MB  
ConstantBNX2_EMAC_LED_1000MB_OVERRIDE  
ConstantBNX2_EMAC_LED_100MB  
ConstantBNX2_EMAC_LED_100MB_OVERRIDE  
ConstantBNX2_EMAC_LED_10MB  
ConstantBNX2_EMAC_LED_10MB_OVERRIDE  
ConstantBNX2_EMAC_LED_BLNK_RATE  
ConstantBNX2_EMAC_LED_BLNK_RATE_ENA  
ConstantBNX2_EMAC_LED_BLNK_TRAFFIC  
ConstantBNX2_EMAC_LED_OVERRIDE  
ConstantBNX2_EMAC_LED_TRAFFIC  
ConstantBNX2_EMAC_LED_TRAFFIC_OVERRIDE  
ConstantBNX2_EMAC_LED_TRAFFIC_STAT  
ConstantBNX2_EMAC_MAC_MATCH0  
ConstantBNX2_EMAC_MAC_MATCH1  
ConstantBNX2_EMAC_MAC_MATCH10  
ConstantBNX2_EMAC_MAC_MATCH11  
ConstantBNX2_EMAC_MAC_MATCH12  
ConstantBNX2_EMAC_MAC_MATCH13  
ConstantBNX2_EMAC_MAC_MATCH14  
ConstantBNX2_EMAC_MAC_MATCH15  
ConstantBNX2_EMAC_MAC_MATCH16  
ConstantBNX2_EMAC_MAC_MATCH17  
ConstantBNX2_EMAC_MAC_MATCH18  
ConstantBNX2_EMAC_MAC_MATCH19  
ConstantBNX2_EMAC_MAC_MATCH2  
ConstantBNX2_EMAC_MAC_MATCH20  
ConstantBNX2_EMAC_MAC_MATCH21  
ConstantBNX2_EMAC_MAC_MATCH22  
ConstantBNX2_EMAC_MAC_MATCH23  
ConstantBNX2_EMAC_MAC_MATCH24  
ConstantBNX2_EMAC_MAC_MATCH25  
ConstantBNX2_EMAC_MAC_MATCH26  
ConstantBNX2_EMAC_MAC_MATCH27  
ConstantBNX2_EMAC_MAC_MATCH28  
ConstantBNX2_EMAC_MAC_MATCH29  
ConstantBNX2_EMAC_MAC_MATCH3  
ConstantBNX2_EMAC_MAC_MATCH30  
ConstantBNX2_EMAC_MAC_MATCH31  
ConstantBNX2_EMAC_MAC_MATCH4  
ConstantBNX2_EMAC_MAC_MATCH5  
ConstantBNX2_EMAC_MAC_MATCH6  
ConstantBNX2_EMAC_MAC_MATCH7  
ConstantBNX2_EMAC_MAC_MATCH8  
ConstantBNX2_EMAC_MAC_MATCH9  
ConstantBNX2_EMAC_MDIO_AUTO_STATUS  
ConstantBNX2_EMAC_MDIO_AUTO_STATUS_AUTO  
ConstantBNX2_EMAC_MDIO_COMM  
ConstantBNX2_EMAC_MDIO_COMM_COMMAND  
ConstantBNX2_EMAC_MDIO_COMM_COMMAND_REA  
ConstantBNX2_EMAC_MDIO_COMM_COMMAND_UND  
ConstantBNX2_EMAC_MDIO_COMM_COMMAND_UND  
ConstantBNX2_EMAC_MDIO_COMM_COMMAND_WRI  
ConstantBNX2_EMAC_MDIO_COMM_DATA  
ConstantBNX2_EMAC_MDIO_COMM_DISEXT  
ConstantBNX2_EMAC_MDIO_COMM_FAIL  
ConstantBNX2_EMAC_MDIO_COMM_PHY_ADDR  
ConstantBNX2_EMAC_MDIO_COMM_REG_ADDR  
ConstantBNX2_EMAC_MDIO_COMM_START_BUSY  
ConstantBNX2_EMAC_MDIO_MODE  
ConstantBNX2_EMAC_MDIO_MODE_AUTO_POLL  
ConstantBNX2_EMAC_MDIO_MODE_BIT_BANG  
ConstantBNX2_EMAC_MDIO_MODE_CLOCK_CNT  
ConstantBNX2_EMAC_MDIO_MODE_MDC  
ConstantBNX2_EMAC_MDIO_MODE_MDINT  
ConstantBNX2_EMAC_MDIO_MODE_MDIO  
ConstantBNX2_EMAC_MDIO_MODE_MDIO_OE  
ConstantBNX2_EMAC_MDIO_MODE_SHORT_PREAM  
ConstantBNX2_EMAC_MDIO_STATUS  
ConstantBNX2_EMAC_MDIO_STATUS_10MB  
ConstantBNX2_EMAC_MDIO_STATUS_LINK  
ConstantBNX2_EMAC_MODE  
ConstantBNX2_EMAC_MODE_25G  
ConstantBNX2_EMAC_MODE_ACPI_RCVD  
ConstantBNX2_EMAC_MODE_EXT_LINK_POL  
ConstantBNX2_EMAC_MODE_FORCE_LINK  
ConstantBNX2_EMAC_MODE_HALF_DUPLEX  
ConstantBNX2_EMAC_MODE_MAC_LOOP  
ConstantBNX2_EMAC_MODE_MAX_DEFER_DROP_E  
ConstantBNX2_EMAC_MODE_MPKT  
ConstantBNX2_EMAC_MODE_MPKT_RCVD  
ConstantBNX2_EMAC_MODE_PORT  
ConstantBNX2_EMAC_MODE_PORT_GMII  
ConstantBNX2_EMAC_MODE_PORT_MII  
ConstantBNX2_EMAC_MODE_PORT_MII_10  
ConstantBNX2_EMAC_MODE_PORT_NONE  
ConstantBNX2_EMAC_MODE_RESET  
ConstantBNX2_EMAC_MODE_TAGGED_MAC_CTL  
ConstantBNX2_EMAC_MODE_TX_BURST  
ConstantBNX2_EMAC_MULTICAST_HASH0  
ConstantBNX2_EMAC_MULTICAST_HASH1  
ConstantBNX2_EMAC_MULTICAST_HASH2  
ConstantBNX2_EMAC_MULTICAST_HASH3  
ConstantBNX2_EMAC_MULTICAST_HASH4  
ConstantBNX2_EMAC_MULTICAST_HASH5  
ConstantBNX2_EMAC_MULTICAST_HASH6  
ConstantBNX2_EMAC_MULTICAST_HASH7  
ConstantBNX2_EMAC_RX_MODE  
ConstantBNX2_EMAC_RX_MODE_ACCEPT_OVERSI  
ConstantBNX2_EMAC_RX_MODE_ACCEPT_RUNTS  
ConstantBNX2_EMAC_RX_MODE_FILT_BROADCAS  
ConstantBNX2_EMAC_RX_MODE_FLOW_EN  
ConstantBNX2_EMAC_RX_MODE_KEEP_MAC_CONT  
ConstantBNX2_EMAC_RX_MODE_KEEP_PAUSE  
ConstantBNX2_EMAC_RX_MODE_KEEP_VLAN_TAG  
ConstantBNX2_EMAC_RX_MODE_LLC_CHK  
ConstantBNX2_EMAC_RX_MODE_NO_CRC_CHK